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Farzaneh Zokaee
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2020 – today
- 2023
- [j3]Farzaneh Zokaee, Fan Chen, Guangyu Sun, Lei Jiang:
Sky-Sorter: A Processing-in-Memory Architecture for Large-Scale Sorting. IEEE Trans. Computers 72(2): 480-493 (2023) - 2021
- [j2]Javad Talafy, Farzaneh Zokaee, Hamid R. Zarandi, Nader Bagherzadeh:
A High Performance, Multi-Bit Output Logic-in-Memory Adder. IEEE Trans. Emerg. Top. Comput. 9(4): 2223-2233 (2021) - [c10]Lei Jiang, Farzaneh Zokaee:
EXMA: A Genomics Accelerator for Exact-Matching. HPCA 2021: 399-411 - [c9]Farzaneh Zokaee, Lei Jiang:
SMART: A Heterogeneous Scratchpad Memory Architecture for Superconductor SFQ-based Systolic CNN Accelerators. MICRO 2021: 912-924 - [c8]Farzaneh Zokaee, Bing Li, Fan Chen:
FeFET-based Process-in-Memory Architecture for Low-Power DNN Training. NANOARCH 2021: 1-6 - [i2]Lei Jiang, Farzaneh Zokaee:
EXMA: A Genomics Accelerator for Exact-Matching. CoRR abs/2101.05314 (2021) - [i1]Farzaneh Zokaee, Lei Jiang:
SMART: A Heterogeneous Scratchpad Memory Architecture for Superconductor SFQ-based Systolic CNN Accelerators. CoRR abs/2109.01269 (2021) - 2020
- [c7]Farzaneh Zokaee, Qian Lou, Nathan Youngblood, Weichen Liu, Yiyuan Xie, Lei Jiang:
LightBulb: A Photonic-Nonvolatile-Memory-based Accelerator for Binarized Convolutional Neural Networks. DATE 2020: 1438-1443 - [c6]Farzaneh Zokaee, Lei Jiang:
Mitigating Voltage Drop in Resistive Memories by Dynamic RESET Voltage Regulation and Partition RESET. HPCA 2020: 275-286
2010 – 2019
- 2019
- [c5]Farzaneh Zokaee, Mingzhe Zhang, Lei Jiang:
FindeR: Accelerating FM-Index-Based Exact Pattern Matching in Genomic Sequences through ReRAM Technology. PACT 2019: 284-295 - [c4]Farzaneh Zokaee, Mingzhe Zhang, Xiaochun Ye, Dongrui Fan, Lei Jiang:
Magma: A Monolithic 3D Vertical Heterogeneous ReRAM-based Main Memory Architecture. DAC 2019: 115 - 2018
- [j1]Farzaneh Zokaee, Hamid R. Zarandi, Lei Jiang:
AligneR: A Process-in-Memory Architecture for Short Read Alignment in ReRAMs. IEEE Comput. Archit. Lett. 17(2): 237-240 (2018) - 2017
- [c3]Farzaneh Zokaee, Hossein Sabaghian Bidgoli, Vahid Janfaza, Payman Behnam, Zainalabedin Navabi:
A novel SAT-based ATPG approach for transition delay faults. HLDVT 2017: 17-22 - [c2]Mohammadreza Nakhkash, Hossein Bardareh, Farzaneh Zokaee, Hamid R. Zarandi:
Designing a differential 3R-2bit RRAM cell for enhancing read margin in cross-point RRAM arrays. NORCAS 2017: 1-6 - 2013
- [c1]Somayeh Sadeghi Kohan, Shahrzad Keshavarz, Farzaneh Zokaee, Farimah Farahmandi, Zainalabedin Navabi:
A new structure for interconnect offline testing. EWDTS 2013: 1-5
Coauthor Index
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