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Sumedh Dhabu
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2010 – 2019
- 2018
- [c8]Sumedh Somnath Dhabu, Yue Zheng, Wenye Liu, Chip-Hong Chang:
Active IC Metering of Digital Signal Processing Subsystem with Two-Tier Activation for Secure Split Test. ISCAS 2018: 1-5 - [c7]Yue Zheng, Sumedh Somnath Dhabu, Chip-Hong Chang:
Securing IoT Monitoring Device using PUF and Physical Layer Authentication. ISCAS 2018: 1-5 - 2017
- [j6]Sumedh Dhabu, A. Prasad Vinod:
A New Time-Domain Approach for the Design of Variable FIR Filters Using the Spectral Parameter Approximation Technique. Circuits Syst. Signal Process. 36(5): 2154-2165 (2017) - [c6]Sumedh Dhabu, Chip-Hong Chang:
A novel scheme for information hiding at physical layer of wireless communications. ISOCC 2017: 256-257 - 2016
- [b1]Sumedh Somnath Dhabu:
Design and implementation of digital filters with very high frequency response flexibility for multi-standard wireless communication receivers. Nanyang Technological University, Singapore, 2016 - [j5]Sumedh Dhabu, A. Prasad Vinod:
Design and FPGA Implementation of Reconfigurable Linear-Phase Digital Filter With Wide Cutoff Frequency Range and Narrow Transition Bandwidth. IEEE Trans. Circuits Syst. II Express Briefs 63-II(2): 181-185 (2016) - [j4]Sumedh Dhabu, Vinod Achutavarrier Prasad:
Design of Modified Second-Order Frequency Transformations Based Variable Digital Filters With Large Cutoff Frequency Range and Improved Transition Band Characteristics. IEEE Trans. Very Large Scale Integr. Syst. 24(2): 413-420 (2016) - [c5]Sumedh Dhabu, Chip-Hong Chang:
A new scheme for secret-hiding in DSP circuits. ISOCC 2016: 49-50 - 2015
- [j3]Sumit Jagdish Darak, Sumedh Dhabu, Christophe Moy, Honggang Zhang, Jacques Palicot, A. Prasad Vinod:
Low complexity and efficient dynamic spectrum learning and tunable bandwidth access for heterogeneous decentralized cognitive radio networks. Digit. Signal Process. 37: 13-23 (2015) - [j2]Sumit Jagdish Darak, Sumedh Dhabu, Christophe Moy, Honggang Zhang, Jacques Palicot, A. Prasad Vinod:
Corrigendum to "Low complexity and efficient dynamic spectrum learning and tunable bandwidth access for heterogeneous decentralized cognitive radio networks" [Digital Signal Processing 37 (Feb. 2015) 13-23]. Digit. Signal Process. 39: 80 (2015) - [c4]Sumedh Dhabu, A. Prasad Vinod:
Reconfigurable digital filter based on fractional delay structure and interpolation technique for wider cutoff frequency range. DSP 2015: 1121-1125 - [c3]Sumedh Dhabu, A. Prasad Vinod, A. S. Madhukumar:
Low complexity fast filter bank-based channelization in L-DACS1 for aeronautical communications. NEWCAS 2015: 1-4 - [c2]Sumedh Dhabu, A. Prasad Vinod:
Design of reconfigurable digital filter based on continuously variable fractional delay and interpolation technique. TSP 2015: 1-5 - 2014
- [j1]Sumedh Dhabu, Kavallur Gopi Smitha, A. Prasad Vinod:
Design of Reconfigurable Filter Bank Architecture Using Improved Coefficient Decimation-Interpolation-Masking Technique for Multi-Standard Wireless Communication Receivers. J. Low Power Electron. 10(3): 417-428 (2014) - 2013
- [c1]Sumedh Dhabu, Smitha K. G., A. Prasad Vinod:
A low complexity reconfigurable channel filter based on decimation, interpolation and frequency response masking. ICASSP 2013: 5583-5587
Coauthor Index
aka: Vinod Achutavarrier Prasad
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