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Santosh Pande
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- affiliation: Georgia Institute of Technology, Atlanta GA, USA
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2020 – today
- 2024
- [c97]Sharjeel Khan, Bodhisatwa Chatterjee, Santosh Pande:
Pythia: Compiler-Guided Defense Against Non-Control Data Attacks. ASPLOS (3) 2024: 850-866 - [c96]Myeongsoo Kim, Santosh Pande, Alessandro Orso:
Improving Program Debloating with 1-DU Chain Minimality. ICSE Companion 2024: 384-385 - [i14]Myeongsoo Kim, Santosh Pande, Alessandro Orso:
Improving Program Debloating with 1-DU Chain Minimality. CoRR abs/2402.00276 (2024) - [i13]Chris Porter, Sharjeel Khan, Kangqi Ni, Santosh Pande:
Combined Static Analysis and Machine Learning Prediction for Application Debloating. CoRR abs/2404.00196 (2024) - 2023
- [j25]Girish Mururu, Sharjeel Khan, Bodhisatwa Chatterjee, Chao Chen, Chris Porter, Ada Gavrilovska, Santosh Pande:
Beacons: An End-to-End Compiler Framework for Predicting and Utilizing Dynamic Loop Characteristics. Proc. ACM Program. Lang. 7(OOPSLA2): 173-203 (2023) - [c95]Chris Porter, Sharjeel Khan, Santosh Pande:
Decker: Attack Surface Reduction via On-Demand Code Mapping. ASPLOS (2) 2023: 192-206 - [c94]Girish Mururu, Kangqi Ni, Ada Gavrilovska, Santosh Pande:
PinIt: Influencing OS Scheduling via Compiler-Induced Affinities. LCTES 2023: 87-98 - [i12]Nathan Braswell, Sharjeel Khan, Santosh Pande:
Practical compilation of fexprs using partial evaluation: Fexprs can performantly replace macros in purely-functional Lisp. CoRR abs/2303.12254 (2023) - 2022
- [j24]Chao Chen, Greg Eisenhauer, Santosh Pande:
Near-Zero Downtime Recovery From Transient-Error-Induced Crashes. IEEE Trans. Parallel Distributed Syst. 33(4): 765-778 (2022) - [c93]Bodhisatwa Chatterjee, Sharjeel Khan, Santosh Pande:
Com-CAS: Effective Cache Apportioning under Compiler Guidance. PACT 2022: 14-27 - [c92]Sharjeel Khan, Bodhisatwa Chatterjee, Santosh Pande:
VICO: demand-driven verification for improving compiler optimizations. ICS 2022: 16:1-16:14 - [c91]Chris Porter, Chao Chen, Santosh Pande:
Compiler-assisted scheduling for multi-instance GPUs. GPGPU@PPoPP 2022: 4:1-4:6 - [c90]Chao Chen, Chris Porter, Santosh Pande:
CASE: a compiler-assisted SchEduling framework for multi-GPU systems. PPoPP 2022: 17-31 - 2021
- [j23]Michael D. Brown, Matthew Pruett, Robert Bigelow, Girish Mururu, Santosh Pande:
Not so fast: understanding and mitigating negative impacts of compiler optimizations on code reuse gadget sets. Proc. ACM Program. Lang. 5(OOPSLA): 1-30 (2021) - [c89]Hrushit Parikh, Vinit Deodhar, Ada Gavrilovska, Santosh Pande:
Distributed Work Stealing at Scale via Matchmaking. CLUSTER 2021: 250-260 - [e4]Santosh Pande, Vivek Sarkar:
Languages and Compilers for Parallel Computing - 32nd International Workshop, LCPC 2019, Atlanta, GA, USA, October 22-24, 2019, Revised Selected Papers. Lecture Notes in Computer Science 11998, Springer 2021, ISBN 978-3-030-72788-8 [contents] - [i11]Bodhisatwa Chatterjee, Sharjeel Khan, Santosh Pande:
Effective Cache Apportioning for Performance Isolation Under Compiler Guidance. CoRR abs/2102.09673 (2021) - [i10]Chao Chen, Greg Eisenhauer, Santosh Pande:
Near-zero Downtime Recovery from Transient-error-induced Crashes. CoRR abs/2103.05185 (2021) - [i9]Girish Mururu, Chao Chen, Chris Porter, Santosh Pande, Ada Gavrilovska:
Compiler-Guided Throughput Scheduling for Many-core Machines. CoRR abs/2103.06647 (2021) - [i8]Chao Chen, Chris Porter, Santosh Pande:
Effective GPU Sharing Under Compiler Guidance. CoRR abs/2107.08538 (2021) - [i7]Chris Porter, Sharjeel Khan, Santosh Pande:
On-the-fly Code Activation for Attack Surface Reduction. CoRR abs/2110.09557 (2021) - 2020
- [c88]Girish Mururu, Kaushik Ravichandran, Ada Gavrilovska, Santosh Pande:
Generating Robust Parallel Programs via Model Driven Prediction of Compiler Optimizations for Non-determinism. ICPP 2020: 32:1-32:12 - [c87]Chris Porter, Girish Mururu, Prithayan Barua, Santosh Pande:
BlankIt library debloating: getting what you want instead of cutting what you don't. PLDI 2020: 164-180 - [i6]Sharjeel Khan, Girish Mururu, Santosh Pande:
A Compiler Assisted Scheduler for Detecting and Mitigating Cache-Based Side Channel Attacks. CoRR abs/2003.03850 (2020) - [i5]Michael D. Brown, Matthew Pruett, Robert Bigelow, Girish Mururu, Santosh Pande:
Not So Fast: Understanding and Mitigating Negative Impacts of Compiler Optimizations on Code Reuse Gadget Sets. CoRR abs/2005.08363 (2020)
2010 – 2019
- 2019
- [c86]Girish Mururu, Ada Gavrilovska, Santosh Pande:
Quantifying and Reducing Execution Variance in STM via Model Driven Commit Optimization. CGO 2019: 109-121 - [c85]Michael D. Brown, Santosh Pande:
CARVE: Practical Security-Focused Software Debloating Using Simple Feature Set Mappings. FEAST@CCS 2019: 1-7 - [c84]Tushar Kumar, Kangqi Ni, Santosh Pande:
Characterizing Dominant Program Behavior Using the Execution-Time Variance of the Call Structure. RTAS 2019: 117-129 - [c83]Chao Chen, Greg Eisenhauer, Santosh Pande, Qiang Guan:
CARE: compiler-assisted recovery from soft failures. SC 2019: 58:1-58:23 - [c82]Michael D. Brown, Santosh Pande:
Is Less Really More? Towards Better Metrics for Measuring Security Improvements Realized Through Software Debloating. CSET @ USENIX Security Symposium 2019 - [i4]Girish Mururu, Chris Porter, Prithayan Barua, Santosh Pande:
Binary Debloating for Security via Demand Driven Loading. CoRR abs/1902.06570 (2019) - [i3]Michael D. Brown, Santosh Pande:
Is Less Really More? Why Reducing Code Reuse Gadget Counts via Software Debloating Doesn't Necessarily Lead to Better Security. CoRR abs/1902.10880 (2019) - [i2]Michael D. Brown, Santosh Pande:
CARVE: Practical Security-Focused Software Debloating Using Simple Feature Set Mappings. CoRR abs/1907.02180 (2019) - 2018
- [c81]Chao Chen, Greg Eisenhauer, Matthew Wolf, Santosh Pande:
LADR: low-cost application-level detector for reducing silent output corruptions. HPDC 2018: 156-167 - [c80]Girish Mururu, Ada Gavrilovska, Santosh Pande:
Quantifying and reducing execution variance in STM via model driven commit optimization. PPoPP 2018: 409-410 - 2016
- [c79]Hrushit Parikh, Vinit Deodhar, Ada Gavrilovska, Santosh Pande:
Efficient distributed workstealing via matchmaking. PPoPP 2016: 37:1-37:2 - 2015
- [c78]Vinit Deodhar, Hrushit Parikh, Ada Gavrilovska, Santosh Pande:
Compiler Assisted Load Balancing on Large Clusters. PACT 2015: 280-291 - [c77]Kaushik Ravichandran, Ada Gavrilovska, Santosh Pande:
PiMiCo: Privacy Preservation via Migration in Collaborative Mobile Clouds. HICSS 2015: 5341-5351 - 2014
- [c76]Kaushik Ravichandran, Ada Gavrilovska, Santosh Pande:
DeSTM: harnessing determinism in STMs for application development. PACT 2014: 213-224 - [c75]Sangho Lee, Changhee Jung, Santosh Pande:
Detecting memory leaks through introspective dynamic behavior modelling using machine learning. ICSE 2014: 814-824 - [c74]Changhee Jung, Sangho Lee, Easwaran Raman, Santosh Pande:
Automated memory leak detection for production use. ICSE 2014: 825-836 - [c73]Kaushik Ravichandran, Santosh Pande:
F2C2-STM: Flux-Based Feedback-Driven Concurrency Control for STMs. IPDPS 2014: 927-938 - 2013
- [c72]Kaushik Ravichandran, Santosh Pande:
Multiverse: efficiently supporting distributed high-level speculation. OOPSLA 2013: 533-552 - 2012
- [c71]Jaswanth Sreeram, Santosh Pande:
Hybrid Transactions: Lock Allocation and Assignment for Irrevocability. IPDPS 2012: 1192-1203 - [c70]Jaswanth Sreeram, Santosh Pande:
Safe compiler-driven transaction checkpointing and recovery. OOPSLA 2012: 41-56 - 2011
- [j22]Xiaotong Zhuang, Santosh Pande:
Compiler-Supported Thread Management for Multithreaded Network Processors. ACM Trans. Embed. Comput. Syst. 10(4): 44:1-44:31 (2011) - [c69]Romain Cledat, Kaushik Ravichandran, Santosh Pande:
Leveraging data-structure semantics for efficient algorithmic parallelism. Conf. Computing Frontiers 2011: 28 - [c68]Kaushik Ravichandran, Sangho Lee, Santosh Pande:
Work Stealing for Multi-core HPC Clusters. Euro-Par (1) 2011: 205-217 - [c67]Jaswanth Sreeram, Santosh Pande:
Parallelizing a Real-Time Physics Engine Using Transactional Memory. Euro-Par (2) 2011: 206-223 - [c66]Romain Cledat, Tushar Kumar, Jaswanth Sreeram, Santosh Pande:
Enriching 3-D Video Games on Multicores. IPDPS 2011: 176-187 - [c65]Romain Cledat, Tushar Kumar, Santosh Pande:
Efficiently speeding up sequential computation through the n-way programming model. OOPSLA 2011: 537-554 - [c64]Changhee Jung, Silvius Rus, Brian P. Railing, Nathan Clark, Santosh Pande:
Brainy: effective selection of data structures. PLDI 2011: 86-97 - 2010
- [j21]Xiaotong Zhuang, Santosh Pande:
An optimization framework for embedded processors with auto-addressing mode. ACM Trans. Program. Lang. Syst. 32(4): 11:1-11:41 (2010) - [c63]Tushar Kumar, Romain Cledat, Santosh Pande:
Dynamic tuning of feature set in highly variant interactive applications. EMSOFT 2010: 289-298 - [c62]Jaswanth Sreeram, Santosh Pande:
Exploiting approximate value locality for data synchronization on multi-core processors. IISWC 2010: 1-10 - [c61]Farhana Aleen, Monirul Sharif, Santosh Pande:
Input-driven dynamic execution prediction of streaming applications. PPoPP 2010: 315-324
2000 – 2009
- 2009
- [j20]Zhiyuan Li, Santosh Pande:
Editorial: Languages, compilers, and tools for embedded systems. ACM Trans. Embed. Comput. Syst. 8(4): 25:1-25:2 (2009) - [i1]Fernando Alegre, Eric Feron, Santosh Pande:
Using Ellipsoidal Domains to Analyze Control Systems Software. CoRR abs/0909.1977 (2009) - 2008
- [c60]Tushar Kumar, Romain Cledat, Jaswanth Sreeram, Santosh Pande:
Statistically Analyzing Execution Variance for Soft Real-Time Applications. LCPC 2008: 124-140 - 2007
- [j19]Xiaotong Zhuang, Santosh Pande:
Power-efficient prefetching for embedded processors. ACM Trans. Embed. Comput. Syst. 6(1): 3 (2007) - [j18]Xiaotong Zhuang, Santosh Pande:
Allocating architected registers through differential encoding. ACM Trans. Program. Lang. Syst. 29(2): 9 (2007) - [c59]Jaswanth Sreeram, Romain Cledat, Tushar Kumar, Santosh Pande:
RSTM : A Relaxed Consistency Software Transactional Memory for Multicores. PACT 2007: 428 - [c58]Tushar Kumar, Jaswanth Sreeram, Romain Cledat, Santosh Pande:
A profile-driven statistical analysis framework for the design optimization of soft real-time applications. ESEC/SIGSOFT FSE 2007: 529-532 - [e3]Santosh Pande, Zhiyuan Li:
Proceedings of the 2007 ACM SIGPLAN/SIGBED Conference on Languages, Compilers, and Tools for Embedded Systems (LCTES'07), San Diego, California, USA, June 13-15, 2007. ACM 2007, ISBN 978-1-59593-632-5 [contents] - 2006
- [j17]Xiaotong Zhuang, Santosh Pande:
Parallelizing load/stores on dual-bank memory embedded processors. ACM Trans. Embed. Comput. Syst. 5(3): 613-657 (2006) - [c57]Tao Zhang, Xiaotong Zhuang, Santosh Pande:
Compiler Optimizations to Reduce Security Overhead. CGO 2006: 346-357 - [c56]Xiaotong Zhuang, Santosh Pande:
A Scalable Priority Queue Architecture for High Speed Network Processing. INFOCOM 2006 - [c55]Ryan Collins, Fernando Alegre, Xiaotong Zhuang, Santosh Pande:
Compiler assisted dynamic management of registers for network processors. IPDPS 2006 - [c54]Kun Zhang, Santosh Pande:
Minimizing downtime in seamless migrations of mobile applications. LCTES 2006: 12-21 - [c53]Xiaotong Zhuang, Santosh Pande:
Effective thread management on network processors with compiler analysis. LCTES 2006: 72-82 - [c52]Xiaotong Zhuang, Tao Zhang, Santosh Pande:
Using Branch Correlation to Identify Infeasible Paths for Anomaly Detection. MICRO 2006: 113-122 - [c51]Kun Zhang, Tao Zhang, Santosh Pande:
Memory Protection through Dynamic Access Control. MICRO 2006: 123-134 - 2005
- [c50]Christian Poellabauer, Tao Zhang, Santosh Pande, Karsten Schwan:
An Efficient Frequency Scaling Approach for Energy-Aware Embedded Real-Time Systems. ARCS 2005: 207-221 - [c49]Tao Zhang, Xiaotong Zhuang, Santosh Pande, Wenke Lee:
Anomalous path detection with hardware support. CASES 2005: 43-54 - [c48]Tao Zhang, Xiaotong Zhuang, Santosh Pande:
Building Intrusion-Tolerant Secure Software. CGO 2005: 255-266 - [c47]Kun Zhang, Santosh Pande:
Efficient application migration under compiler guidance. LCTES 2005: 10-20 - [c46]Xiaotong Zhuang, Santosh Pande:
Differential register allocation. PLDI 2005: 168-179 - [c45]Kalyan S. Perumalla, Richard M. Fujimoto, Prashant J. Thakare, Santosh Pande, Homa Karimabadi, Yuri A. Omelchenko, Jonathan Driscoll:
Performance prediction of large-scale parallel discrete event models of physical systems. WSC 2005: 356-364 - 2004
- [j16]Sathyanarayanan Thammanur, Santosh Pande:
A fast, memory-efficient register allocation framework for embedded systems. ACM Trans. Program. Lang. Syst. 26(6): 938-974 (2004) - [c44]Weidong Shi, Tao Zhang, Santosh Pande:
Static Techniques to Improve Power Efficiency of Branch Predictors. Asia-Pacific Computer Systems Architecture Conference 2004: 385-398 - [c43]Xiaotong Zhuang, Tao Zhang, Santosh Pande:
HIDE: an infrastructure for efficiently protecting information leakage on the address bus. ASPLOS 2004: 72-84 - [c42]Xiaotong Zhuang, Tao Zhang, Hsien-Hsin S. Lee, Santosh Pande:
Hardware assisted control flow obfuscation for embedded processors. CASES 2004: 292-302 - [c41]Kun Zhang, Tao Zhang, Santosh Pande:
Binary translation to improve energy efficiency through post-pass register re-allocation. EMSOFT 2004: 74-85 - [c40]Tao Zhang, Weidong Shi, Santosh Pande:
Static Techniques to Improve Power Efficiency of Branch Predictors. HiPC 2004: 274-285 - [c39]Tankut Akgul, Vincent John Mooney III, Santosh Pande:
A Fast Assembly Level Reverse Execution Method via Dynamic Slicing. ICSE 2004: 522-531 - [c38]Xiaotong Zhuang, Santosh Pande:
Power-efficient prefetching via bit-differential offset assignment on embedded processors. LCTES 2004: 67-77 - [c37]Xiaotong Zhuang, Tao Zhang, Santosh Pande:
Hardware-managed register allocation for embedded processors. LCTES 2004: 192-201 - [c36]Xiaotong Zhuang, Santosh Pande:
Balancing register allocation across threads for a multithreaded network processor. PLDI 2004: 289-300 - 2003
- [j15]Fabrice Rastello, Amit Rao, Santosh Pande:
Optimal task scheduling at run time to exploit intra-tile parallelism. Parallel Comput. 29(2): 209-239 (2003) - [c35]Xiaotong Zhuang, Santosh Pande:
Resolving Register Bank Conflicts for a Network Processor. IEEE PACT 2003: 269-278 - [c34]Mark Leair, Santosh Pande:
Optimizing Dynamic Dispatches through Type Invariant Region Analysis. HiPC 2003: 459-468 - [c33]Xiaotong Zhuang, Santosh Pande:
Compiler Scheduling of Mobile Agents for Minimizing Overheads. ICDCS 2003: 600- - [c32]Dong Zhou, Santosh Pande, Karsten Schwan:
Method Partitioning - Runtime Customization of Pervasive Programs without Design-time Application Knowledge. ICDCS 2003: 610-619 - [c31]Tao Zhang, Santosh Pande, Antonio Valverde Garcia:
Tamper-resistant whole program partitioning. LCTES 2003: 209-219 - [c30]Xiaotong Zhuang, ChokSheak Lau, Santosh Pande:
Storage assignment optimizations through variable coalescence for embedded processors. LCTES 2003: 220-231 - 2002
- [j14]Waibhav Tembe, Santosh Pande:
Loop Restructuring for Data I/O Minimization on Limited On-Chip Memory Embedded Processors. IEEE Trans. Computers 51(10): 1269-1280 (2002) - [j13]Narasimhan Ramasubramanian, Ram Subramanian, Santosh Pande:
Automatic Compilation of Loops to Exploit Operator Parallelism on Configurable Arithmetic Logic Units. IEEE Trans. Parallel Distributed Syst. 13(1): 45-66 (2002) - [c29]Xiaotong Zhuang, Santosh Pande, John S. Greenland Jr.:
A Framework for Parallelizing Load/Stores on Embedded Processors. IEEE PACT 2002: 68-79 - [c28]Tao Zhang, Santosh Pande, André L. M. dos Santos, Franz Josef Bruecklmayr:
Leakage-proof program partitioning. CASES 2002: 136-145 - [c27]Siddharth Rele, Santosh Pande, Soner Önder, Rajiv Gupta:
Optimizing Static Power Dissipation by Functional Units in Superscalar Processors. CC 2002: 261-275 - [c26]Abhishek Singh, Santosh Pande:
Compiler optimizations for Java aglets in distributed data intensive applications. SAC 2002: 87-92 - 2001
- [j12]Siddharth Rele, Vipin Jain, Santosh Pande, J. Ramanujam:
Compact and efficient code generation through program restructuringon limited memory embedded DSPs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 20(4): 477-494 (2001) - [c25]Santosh Pande, Tareq Bali:
A Compilation Method for Communication-Efficient Partitioning of DOALL Loops. Compiler Optimizations for Scalable Parallel Systems Languages 2001: 413-444 - [c24]Ram Subramanian, Santosh Pande:
A Data Re-use Based Compiler Optimization for FPGAs. FPL 2001: 648-652 - [e2]Santosh Pande, Dharma P. Agrawal:
Compiler Optimizations for Scalable Parallel Systems Languages, Compilation Techniques, and Run Time Systems. Lecture Notes in Computer Science 1808, Springer 2001, ISBN 3-540-41945-4 [contents] - [e1]Seongsoo Hong, Santosh Pande:
Proceedings of The Workshop on Languages, Compilers, and Tools for Embedded Systems (LCTES 2001), June 22-23, 2001 / The Workshop on Optimization of Middleware and Distributed Systems (OM 2001), June 18, 2001, Snowbird, Utah, USA. ACM 2001, ISBN 1-58113-425-8 [contents] - 2000
- [c23]Lei Wang, Waibhav Tembe, Santosh Pande:
A Framework for Loop Distribution on Limited On-Chip Memory Processors. CC 2000: 141-156 - [c22]Srivatsan Narasimhan, Santosh Pande:
Compiler Based Scheduling of Java Mobile Agents. LCPC 2000: 372-376 - [c21]Deepankar Bairagi, Santosh Pande, Dharma P. Agrawal:
A Framework for Efficient Register Allocation through Selective Register Demotion. LCR 2000: 57-69 - [c20]Deepankar Bairagi, Santosh Pande, Dharma P. Agrawal:
A Framework for Enhancing Code Quality in Limited Register Set Embedded Processors. LCTES 2000: 81-95
1990 – 1999
- 1999
- [j11]Santosh Pande, Tareq Bali:
A Computation+Communication Load Balanced Loop Partitioning Method for Distributed Memory Systems. J. Parallel Distributed Comput. 58(3): 515-545 (1999) - [j10]Rajiv Gupta, Santosh Pande, Kleanthis Psarris, Vivek Sarkar:
Compilation techniques for parallel systems. Parallel Comput. 25(13-14): 1741-1783 (1999) - [j9]Amit Rao, Santosh Pande:
Storage assignment using expression tree transformations to generate compact and efficient DSP code. SIGARCH Comput. Archit. News 27(1): 39-42 (1999) - [c19]Ram Subramanian, Santosh Pande:
Efficient Program Partitioning Based on Compiler Controlled Communication. IPPS/SPDP Workshops 1999: 4-18 - [c18]Vipin Jain, Siddharth Rele, Santosh Pande, J. Ramanujam:
Code Restructuring for Improving Real Time Response through Code Speed, Size Trade-offs on Limited Memory Embedded DSPs. LCPC 1999: 459-463 - [c17]Lei Wang, Santosh Pande:
Data I/O Minimization for Loops on Limited Onchip Memory Processors. LCPC 1999: 472-476 - [c16]Amit Rao, Santosh Pande:
Storage Assignment Optimizations to Generate Compact and Efficient Code on Embedded DSPs. PLDI 1999: 128-138 - 1998
- [j8]Ram Subramanian, Santosh Pande:
A framework for performance-based program partitioning. Parallel Distributed Comput. Pract. 1(4) (1998) - [j7]Sekhar Darbha, Santosh Pande:
A Robust Compile Time Method for Scheduling Task Parallelism on Distributed Memory Machines. J. Supercomput. 12(4): 325-347 (1998) - [c15]Fabrice Rastello, Amit Rao, Santosh Pande:
Optimal Task Scheduling to Minimize Inter-Tile Latencies. ICPP 1998: 172-179 - [c14]Narasimhan Ramasubramanian, Ram Subramanian, Santosh Pande:
Automatic Analysis of Loops to Exploit Operator Parallelism on Reconfigurable Systems. LCPC 1998: 305-322 - [c13]Sundaram Anantharaman, Santosh Pande:
An Efficient Data Partitioning Method for Limited Memory Embedded Systems. LCTES 1998: 108-222 - [c12]Sundaram Anantharaman, Santosh Pande:
Compiler Optimizations for Real Time Execution of Loops on Limited Memory Embedded Systems. RTSS 1998: 154-164 - 1996
- [j6]Santosh Pande, Kleanthis Psarris:
Program Repartitioning on Varying Communication Cost Parallel Architectures. J. Parallel Distributed Comput. 33(2): 205-213 (1996) - [j5]Santosh Pande, Dharma P. Agrawal:
Special Issue on Compilation Techniques for Distributed Memory Systems: Guest Editors' Introduction. J. Parallel Distributed Comput. 38(2): 107-113 (1996) - [c11]Sekhar Darbha, Santosh Pande:
A robust compile time method for scheduling task parallelism on distributed memory machines. IEEE PACT 1996: 156-162 - [c10]Santosh Pande, Tareq Bali:
A Multi-Phase Partitioner and Scheduler for Distributed Memory Systems. HICSS (1) 1996: 547-556 - [c9]Santosh Pande:
A Compile Time Partitioning Method for DOALL Loops on Distributed Memory Systems. ICPP, Vol. 3 1996: 35-44 - 1995
- [j4]Santosh Pande, Dharma P. Agrawal:
Run-time issues in program partitioning on distributed memory systems. Concurr. Pract. Exp. 7(5): 429-454 (1995) - [j3]Santosh Pande, Dharma P. Agrawal, Jon Mauney:
A Scalable Scheduling Scheme for Functional Parallelism on Distributed Memory Multiprocessor Systems. IEEE Trans. Parallel Distributed Syst. 6(4): 388-399 (1995) - [c8]Kleanthis Psarris, Santosh Pande:
Classical dependence analysis techniques: sufficiently accurate in practice. HICSS (2) 1995: 123-132 - [c7]Santosh Pande:
A communication+computation load balanced loop partitioning method. SPDP 1995: 376-381 - 1994
- [j2]Santosh Pande, Dharma P. Agrawal, Jon Mauney:
Compiling functional parallelism on distributed-memory systems. IEEE Parallel Distributed Technol. Syst. Appl. 2(1): 64-76 (1994) - [j1]Santosh Pande, Dharma P. Agrawal, Jon Mauney:
A Threshold Scheduling Strategy for Sisal on Distributed Memory Machines. J. Parallel Distributed Comput. 21(2): 223-236 (1994) - [c6]Santosh Pande, Kleanthis Psarris:
Scheduling Acyclic Task Graphs on Distributed Memory Parallel Architectures. Parallel Processing of Discrete Optimization Problems 1994: 289-304 - [c5]Kleanthis Psarris, Santosh Pande:
An Empirical Study of the I Test for Exact Data Dependence. ICPP (3) 1994: 92-96 - [c4]Santosh Pande, Kleanthis Psarris:
Compiling Functional Parallelism on a Family of Different Distributed Memory Architectures. ICPP (1) 1994: 182-186 - [c3]Santosh Pande, Kleanthis Psarris:
A Compilation Technique for Varying Communication Cost NUMA Architectures. PARLE 1994: 49-60 - 1991
- [c2]Sukil Kim, Santosh Pande, Dharma P. Agrawal, Jon Mauney:
A Message Segmentation Technique to Minimize Task Completion Time. IPPS 1991: 519-524 - 1990
- [c1]Santosh Pande, Dharma P. Agrawal, Jon Mauney:
On Control Flow and Pseudo-Static Dynamic Allocation Strategy. ICPP (2) 1990: 300-301
Coauthor Index
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