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Song Guo 0003
Person information
- affiliation: National University of Defense Technology, National Laboratory for Parallel and Distributed Processing, Changsha, China
Other persons with the same name
- Song Guo — disambiguation page
- Song Guo 0001
— Hong Kong Polytechnic University, Department of Computing, Hong Kong (and 2 more)
- Song Guo 0002
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2010 – 2019
- 2015
- [j7]Song Guo, Yong Dou, Yuanwu Lei, Guiming Wu:
A deeply-pipelined FPGA-based SpMV accelerator with a hardware-friendly storage scheme. IEICE Electron. Express 12(11): 20150161 (2015) - [j6]Song Guo, Yong Dou, Yuanwu Lei, Rongchun Li, Yu Li:
An efficient multi-standard QC-LDPC decoder based on the row-layered decoding algorithm. IEICE Electron. Express 12(13): 20150356 (2015) - [j5]Guiming Wu, Miao Wang, Xianghui Xie, Yong Dou, Song Guo:
面向定制结构的稀疏矩阵分块方法 (Sparse Matrix Blocking Method for Custom Architecture). 计算机科学 42(11): 63-64 (2015) - [c7]Song Guo, Yong Dou, Yuanwu Lei, Qiang Wang
Designing Parallel Sparse Matrix Transposition Algorithm Using ELLPACK-R for GPUs. NCCET 2015: 61-68 - [c6]Yueqing Wang, Yong Dou, Song Guo, Yuanwu Lei, Baofeng Li, Qiang Wang
Accelerating Molecular Dynamics Simulations on Heterogeneous Architecture. NCCET 2015: 118-132 - 2014
- [j4]Yueqing Wang, Yong Dou, Song Guo, Yuanwu Lei, Dan Zou:
CPU-GPU hybrid parallel strategy for cosmological simulations. Concurr. Comput. Pract. Exp. 26(3): 748-765 (2014) - [j3]Dan Zou, Yong Dou, Song Guo, Rongchun Li, Lin Deng:
Supernodal sparse Cholesky factorization on graphics processing units. Concurr. Comput. Pract. Exp. 26(16): 2713-2726 (2014) - [c5]Zhiqiang Liu, Jingfei Jiang, Yong Dou, Rongchun Li, Song Guo:
A high throughput K-best detector on FPGA. BlackSeaCom 2014: 92-96 - 2013
- [j2]Dan Zou, Yong Dou, Song Guo, Shi-Ce Ni:
High performance sparse matrix-vector multiplication on FPGA. IEICE Electron. Express 10(17): 20130529 (2013) - [c4]Rongchun Li, Jie Zhou, Yong Dou, Song Guo, Dan Zou, Shi Wang:
A multi-standard efficient column-layered LDPC decoder for Software Defined Radio on GPUs. SPAWC 2013: 724-728 - 2012
- [j1]Rongchun Li, Yong Dou, Yuanwu Lei, Shi-Ce Ni, Song Guo:
Design and Implementation of the Parameterized Multi-Standard High-Throughput Radix-4 Viterbi Decoder on FPGA. IEICE Trans. Commun. 95-B(5): 1602-1611 (2012) - 2011
- [c3]Yuanwu Lei, Yong Dou, Song Guo, Jie Zhou:
FPGA Implementation of Variable-Precision Floating-Point Arithmetic. APPT 2011: 127-141 - [c2]Yuanwu Lei, Yong Dou, Li Shen, Jie Zhou, Song Guo:
Special-purposed VLIW architecture for IEEE-754 quadruple precision elementary functions on FPGA. ICCD 2011: 219-225 - 2010
- [c1]Yong Dou, Yuanwu Lei, Guiming Wu, Song Guo, Jie Zhou, Li Shen:
FPGA accelerating double/quad-double high precision floating-point applications for ExaScale computing. ICS 2010: 325-336
Coauthor Index
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