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Michelangelo Grosso
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2020 – today
- 2024
- [c51]Giulia Elena Aliffi, Joao Baixinho, Dalibor Barri, Francesco Daghero, Nicola Di Carolo, Gabriele Faraone, Michelangelo Grosso, Daniele Jahier Pagliari, Jiri Jakovenko, Vladimír Janícek, Dario Licastro, Vazgen Melikyan, Matteo Risso, Vittorio Romano, Eugenio Serianni, Martin Stastný, Patrik Vacula, Giorgia Vitanza, Chen Xie:
AMBEATion: Analog Mixed-Signal Back-End Design Automation with Machine Learning and Artificial Intelligence Techniques. DATE 2024: 1-6 - [c50]Riccardo Cantoro, Michelangelo Grosso, Iacopo Guglielminetti, Reza Khoshzaban
, Matteo Sonza Reorda
Assessing the Effectiveness of Software-Based Self-Test Programs for Static Cell-Aware Test. ETS 2024: 1-4 - [i2]Gabriele Faraone, Francesco Daghero, Eugenio Serianni, Dario Licastro, Nicola Di Carolo, Michelangelo Grosso, Giovanna Antonella Franchino, Daniele Jahier Pagliari:
Machine Learning-based feasibility estimation of digital blocks in BCD technology. CoRR abs/2410.07989 (2024) - 2023
- [c49]Nunzio Mirabella, Andrea Floridia, Riccardo Cantoro, Michelangelo Grosso, Matteo Sonza Reorda:
Targeting different defect-oriented fault models in IC testing: an experimental approach. DSD 2023: 214-219 - 2022
- [c48]Nunzio Mirabella
A comparative overview of ATPG flows targeting traditional and cell-aware fault models. ICECS 2022 2022: 1-4 - [c47]Paolo Bernardi, Riccardo Cantoro, Anthony Coyette, W. Dobbeleare, Moritz Fieback
Recent Trends and Perspectives on Defect-Oriented Testing. IOLTS 2022: 1-10 - 2021
- [c46]Nunzio Mirabella
Comparing different solutions for testing resistive defects in low-power SRAMs. LATS 2021: 1-6 - [i1]Nunzio Mirabella, Michelangelo Grosso, Giovanna Franchino, Salvatore Rinaudo, Ioannis Deretzis, Antonino La Magna, Matteo Sonza Reorda:
Comparing different solutions for testing resistive defects in low-power SRAMs. CoRR abs/2112.15176 (2021) - 2020
- [c45]Nunzio Mirabella
On the test of single via related defects in digital VLSI designs. DDECS 2020: 1-6
2010 – 2019
- 2019
- [j11]Edoardo Giusto
An Investigation on Pervasive Technologies for IoT-based Thermal Monitoring. Sensors 19(3): 663 (2019) - [c44]Michelangelo Grosso, Matteo Sonza Reorda
Software-Based Self-Test for Delay Faults. VLSI-SoC (Selected Papers) 2019: 1-19 - [c43]Michelangelo Grosso, Salvatore Rinaudo, Andrea Casalino, Matteo Sonza Reorda
Software-Based Self-Test for Transition Faults: a Case Study. VLSI-SoC 2019: 76-81 - 2018
- [c42]Michelangelo Grosso, Salvatore Rinaudo, Edoardo Patti, Andrea Acquaviva:
An energy-autonomous wireless sensor network development platform. DTIS 2018: 1-6 - 2017
- [c41]Michelangelo Grosso, Davide Lena, Salvatore Rinaudo, David Alejandro Fernandez Guzman, Danilo Demarchi
Training a classifier for activity recognition using body motion simulation. BioCAS 2017: 1-4 - 2016
- [c40]Guido Marchetto, Sarosh Tahir, Michelangelo Grosso:
A blocking probability study for the aethereal network-on-chip. IDT 2016: 104-109 - [c39]Davide Lena, Michelangelo Grosso
A compact IGBT electro-thermal model in Verilog-A for fast system-level simulation. IECON 2016: 3793-3798 - [c38]Michelangelo Grosso
Energy-efficient battery charging in electric vehicles with solar panels. RTSI 2016: 1-5 - [c37]Lorenzo Bottaccioli, Edoardo Patti, Michelangelo Grosso, Gaetano Rasconà, Angelo Marotta, Salvatore Rinaudo, Andrea Acquaviva, Enrico Macii:
Distributed Software Infrastructure for Evaluating the Integration of Photovoltaic Systems in Urban Districts. SMARTGREENS 2016: 357-362 - 2015
- [j10]Nicola Bombieri
Addressing the Smart Systems design challenge: The SMAC platform. Microprocess. Microsystems 39(8): 1158-1173 (2015) - [c36]Francesco Gavino Brundu, Edoardo Patti, Andrea Acquaviva, Michelangelo Grosso, Gaetano Rasconà, Salvatore Rinaudo, Enrico Macii:
A new distributed framework for integration of district energy data from heterogeneous devices. DATE 2015: 992-993 - 2014
- [c35]Renaud Gillon
Multi-domain simulation as a foundation for the engineering of smart systems: Challenges and the SMAC vision. ICECS 2014: 858-861 - 2013
- [j9]Michelangelo Grosso
Exploiting Fault Model Correlations to Accelerate SEU Sensitivity Assessment. IEEE Trans. Ind. Informatics 9(1): 142-148 (2013) - [c34]Paolo Bernardi
A functional test algorithm for the register forwarding and pipeline interlocking unit in pipelined microprocessors. IDT 2013: 1-6 - [c33]Paolo Bernardi
On the Functional Test of the Register Forwarding and Pipeline Interlocking Unit in Pipelined Processors. MTV 2013: 52-57 - 2012
- [j8]Michelangelo Grosso
Software-Based Testing for System Peripherals. J. Electron. Test. 28(2): 189-200 (2012) - [j7]Marta Portela-García
On the use of embedded debug features for permanent and transient fault resilience in microprocessors. Microprocess. Microsystems 36(5): 334-343 (2012) - [c32]Paolo Bernardi
A SBST strategy to test microprocessors' Branch Target Buffer. DDECS 2012: 306-311 - [c31]Paolo Bernardi
On-line software-based self-test of the Address Calculation Unit in RISC processors. ETS 2012: 1-6 - 2011
- [j6]Michelangelo Grosso
Functional Verification of DMA Controllers. J. Electron. Test. 27(4): 505-516 (2011) - [c30]Paolo Bernardi, Michelangelo Grosso, Ernesto Sánchez, Oscar Ballan:
Fault grading of software-based self-test procedures for dependable automotive applications. DATE 2011: 513-514 - [c29]Jorge Luis Lagos-Benites
An FPGA-Emulation-Based Platform for Characterization of Digital Baseband Communication Systems. DFT 2011: 391-398 - [c28]Jorge Luis Lagos-Benites
A Low-Cost Emulation System for Fast Co-verification and Debug. ETS 2011: 212 - 2010
- [j5]Paolo Bernardi
Exploiting an infrastructure-intellectual property for systems-on-chip test, diagnosis and silicon debug. IET Comput. Digit. Tech. 4(2): 104-113 (2010) - [j4]Paolo Bernardi
A Hybrid Approach for Detection and Correction of Transient Faults in SoCs. IEEE Trans. Dependable Secur. Comput. 7(4): 439-445 (2010) - [c27]Michelangelo Grosso
A software-based self-test methodology for system peripherals. ETS 2010: 195-200 - [c26]Paolo Bernardi
An adaptive tester architecture for volume diagnosis. ETS 2010: 227-232 - [c25]Paolo Rech
Analysis of root causes of alpha sensitivity variations on microprocessors manufactured using different cell layouts. IOLTS 2010: 29-34 - [c24]Michelangelo Grosso
An on-line fault detection technique based on embedded debug features. IOLTS 2010: 167-172 - [c23]M. Di Marzio, Michelangelo Grosso
A novel scalable and reconfigurable emulation platform for embedded systems verification. ISCAS 2010: 865-868 - [c22]Paolo Bernardi
A programmable BIST for DRAM testing and diagnosis. ITC 2010: 447-456 - [c21]Michelangelo Grosso
Functional test generation for DMA controllers. LATW 2010: 1-6 - [c20]Oscar Ballan, Paolo Bernardi
A Fault Grading Methodology for Software-Based Self-Test Programs in Systems-on-Chip. MTV 2010: 43-46
2000 – 2009
- 2009
- [j3]Davide Appello, Paolo Bernardi
Effective Diagnostic Pattern Generation Strategy for Transition-Delay Faults in Full-Scan SOCs. IEEE Trans. Very Large Scale Integr. Syst. 17(11): 1654-1659 (2009) - [c19]Davide Appello
Automatic Functional Stress Pattern Generation for SoC Reliability Characterization. ETS 2009: 93-98 - [c18]Paolo Rech, Simone Gerardin
Evaluating Alpha-induced soft errors in embedded microprocessors. IOLTS 2009: 69-74 - [c17]Michelangelo Grosso
Exploiting embedded FPGA in on-line software-based test strategies for microprocessor cores. IOLTS 2009: 95-100 - [c16]Davide Appello
DfT Reuse for Low-Cost Radiation Testing of SoCs: A Case Study. VTS 2009: 276-281 - 2008
- [c15]Davide Appello
An Innovative and Low-Cost Industrial Flow for Reliability Characterization of SoCs. ETS 2008: 140-145 - [c14]Paolo Bernardi
Exploiting MOEA to Automatically Geneate Test Programs for Path-Delay Faults in Microprocessors. EvoWorkshops 2008: 224-234 - [c13]Paolo Bernardi
A Deterministic Methodology for Identifying Functionally Untestable Path-Delay Faults in Microprocessor Cores. MTV 2008: 103-108 - [c12]Kyriakos Christou, Maria K. Michael, Paolo Bernardi
A Novel SBST Generation Technique for Path-Delay Faults in Microprocessors Exploiting Gate- and RT-Level Descriptions. VTS 2008: 389-394 - 2007
- [j2]Paolo Bernardi
A System-layer Infrastructure for SoC Diagnosis. J. Electron. Test. 23(5): 389-404 (2007) - [c11]Jorge Luis Lagos-Benites
An Effective Approach for the Diagnosis of Transition-Delay Faults in SoCs, based on SBST and Scan Chains. DFT 2007: 291-300 - [c10]Michelangelo Grosso
Safety Evaluation of NanoFabrics. DFT 2007: 418-426 - [c9]Paolo Bernardi
On the Automatic Generation of Test Programs for Path-Delay Faults in Microprocessor Cores. ETS 2007: 179-184 - [c8]Paolo Bernardi
Hardware-accelerated path-delay fault grading of functional test programs for processor-based systems. ACM Great Lakes Symposium on VLSI 2007: 411-416 - 2006
- [j1]Davide Appello
System-in-Package Testing: Problems and Solutions. IEEE Des. Test Comput. 23(3): 203-211 (2006) - [c7]Paolo Bernardi
Test Considerations about the Structured ASIC Paradigm. DDECS 2006: 232-233 - [c6]Davide Appello
Embedded Memory Diagnosis: An Industrial Workflow. ITC 2006: 1-9 - [c5]Davide Appello
On the Automation of the Test Flow of Complex SoCs. VTS 2006: 166-171 - [c4]Paolo Bernardi
A Pattern Ordering Algorithm for Reducing the Size of Fault Dictionaries. VTS 2006: 386-391 - 2005
- [c3]Paolo Bernardi
Exploiting an infrastructure IP to reduce memory diagnosis costs in SoCs. ETS 2005: 202-207 - [c2]Alberto Manzone, Paolo Bernardi
Integrating BIST Techniques for On-Line SoC Testing. IOLTS 2005: 235-240 - [c1]Paolo Bernardi
Exploiting an I-IP for both Test and Silicon Debug of Microprocessor Cores. MTV 2005: 55-62
Coauthor Index
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last updated on 2024-11-19 20:43 CET by the dblp team
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