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Shinji Tomita
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2010 – 2019
- 2018
- [j11]Jiachao Zhang, Shin-ichiro Mori, Shinji Tomita:
Evaluation of Three Quads Using Matrix Transpose. J. Inf. Process. 26: 301-305 (2018) - 2012
- [c35]Ryota Henmi, Yusuke Nishimura, Hiroaki Suzuki, Shinji Fukuma, Shin-ichiro Mori, Akinori Yamaguchi, Shinji Tomita:
Prototype Implementation of a GPU-based Interactive Coupled Fluid-Structure Simulation. SNPD 2012: 721-725 - 2011
- [j10]Jun Yao, Shinobu Miwa, Hajime Shimada, Shinji Tomita:
A Fine-Grained Runtime Power/Performance Optimization Method for Processors with Adaptive Pipeline Depth. J. Comput. Sci. Technol. 26(2): 292-301 (2011)
2000 – 2009
- 2009
- [j9]Jun Yao, Kosuke Ogata, Hajime Shimada, Shinobu Miwa, Hiroshi Nakashima, Shinji Tomita:
An Instruction Scheduler for Dynamic ALU Cascading Adoption. Inf. Media Technol. 4(4): 696-713 (2009) - 2008
- [j8]Jun Yao, Shinobu Miwa, Hajime Shimada, Shinji Tomita:
A Dynamic Control Mechanism for Pipeline Stage Unification by Identifying Program Phases. IEICE Trans. Inf. Syst. 91-D(4): 1010-1022 (2008) - [c34]Shinobu Miwa, Hironori Ichibayashi, Hidetsugu Irie, Masahiro Goshima, Hironori Nakajo, Shinji Tomita:
Low-Complexity Bypass Network Using Small RAM. CDES 2008: 153-159 - [c33]Kesuke Hashimoto, Shin-ichiro Mori, Akinori Yamaguchi, Makoto Komatsubara, Shinji Tomita:
Interactive Fluid Simulation and its Remote Steering Framework with Visual and Haptic Feedback. MSV 2008: 53-57 - [c32]Megumi Nakao, Kotaro Minato, Naoto Kume, Shin-ichiro Mori, Shinji Tomita:
Vertex-preserving Cutting of Elastic Objects. VR 2008: 277-278 - 2007
- [j7]Jun Yao, Shinobu Miwa, Hajime Shimada, Shinji Tomita:
Optimal pipeline depth with pipeline stage unification adoption. SIGARCH Comput. Archit. News 35(5): 3-9 (2007) - 2006
- [c31]Shinji Tomita, Yukio Hayashi:
Spatial analysis of centralization and decentralization in the population migration network. APVIS 2006: 139-142 - 2005
- [c30]Jun Yao, Hajime Shimada, Yasuhiko Nakashima, Shin-ichiro Mori, Shinji Tomita:
Program Phase Detection Based Dynamic Control Mechanisms for Pipeline Stage Unification Adoption. ISHPC 2005: 494-507 - 2004
- [c29]Shinji Tomita, Akira Namatame:
Mechanism Design for Environmental Issues. JSAI Workshops 2004: 80-94 - [c28]Alam Mujahid, Koh Kakusho, Michihiko Minoh, Yasuhiko Nakashima, Shin-ichiro Mori, Shinji Tomita:
Simulating realistic force and shape of virtual cloth with adaptive meshes and its parallel implementation in OpenMP. Parallel and Distributed Computing and Networks 2004: 386-391 - [c27]Motohiro Takayama, Yuki Shinomoto, Masahiro Goshima, Shin-ichiro Mori, Yasuhiko Nakashima, Shinji Tomita:
Implementation of Cell-Projection Parallel Volume Rendering with Dynamic Load Balancing. PDPTA 2004: 373-382 - 2003
- [c26]Yoshiro Imai, Shinji Tomita:
A Web-Based Education Tool for Collaborative Learning of Assembly Programming. ICWI 2003: 703-710 - [c25]Shinji Tomita, Akira Namatame:
Bilateral Tradings with and without Strategic Thinking. MABS 2003: 73-88 - 2002
- [c24]Yoshiro Imai, Shinji Tomita, Haruo Niimi, Hitoshi Inomo, Wataru Shiraki, Hiroshi Ishikawa:
Development of an Education Tool for Computer System. ICCE 2002: 1309-1310 - 2001
- [c23]Masahiro Goshima, Kengo Nishino, Toshiaki Kitamura, Yasuhiko Nakashima, Shinji Tomita, Shin-ichiro Mori:
A high-speed dynamic instruction scheduling scheme for superscalar processors. MICRO 2001: 225-236
1990 – 1999
- 1999
- [j6]Atsushi Kubota, Shogo Tatsumi, Toshihiko Tanaka, Masahiro Goshima, Shin-ichiro Mori, Hiroshi Nakashima, Shinji Tomita:
A Technique to Eliminate Redundant Inter-Processor Communication on Parallelizing Compiler TINPAR. Int. J. Parallel Program. 27(2): 97-109 (1999) - [e1]Constantine D. Polychronopoulos, Kazuki Joe, Akira Fukuda, Shinji Tomita:
High Performance Computing, Second International Symposium, ISHPC'99, Kyoto, Japan, May 26-28, 1999, Proceedings. Lecture Notes in Computer Science 1615, Springer 1999, ISBN 3-540-65969-2 [contents] - 1998
- [c22]Shin-ya Goto, Atsushi Kubota, Toshihiko Tanaka, Masahiro Goshima, Shin-ichiro Mori, Hiroshi Nakashima, Shinji Tomita:
Optimized Code Generation for Heterogeneous Computing Environment using Parallelizing Compiler TINPAR. IEEE PACT 1998: 426-433 - 1997
- [c21]Kazuhiko Ohno, Masahiko Ikawa, Masahiro Goshima, Shin-ichiro Mori, Hiroshi Nakashima, Shinji Tomita:
Efficient Goal Scheduling in Concurrent Logic Language using Type-Based Dependency Analysis. ASIAN 1997: 268-282 - [c20]Kazuhiko Ohno, Masahiko Ikawa, Shin-ichiro Mori, Hiroshi Nakashima, Shinji Tomita, Masahiro Goshima:
Improvement of message communication in concurrent logic language. PASCO 1997: 156-164 - [c19]Atsushi Kubota, Shogo Tatsumi, Toshihiko Tanaka, Masahiro Goshima, Shin-ichiro Mori, Hiroshi Nakashima, Shinji Tomita:
A Technique to Eliminate Redundant Inter-Processor Communication on Parallelizing Compiler TINPAR. ISHPC 1997: 195-204 - [c18]Jim Tørresen, Shin-ichiro Mori, Hiroshi Nakashima, Shinji Tomita, Olav Landsverk:
Exploiting Parallel Computers to Reduce Neural Network Training Time of Real Applications. ISHPC 1997: 405-414 - 1996
- [c17]Hesham Keshk, Shin-ichiro Mori, Hiroshi Nakashima, Shinji Tomita:
Amon2: A Parallel Wire Routing Algorithm on a Torus Network Parallel Computer. International Conference on Supercomputing 1996: 197-204 - 1995
- [c16]Shin-ichiro Mori, Masahiro Goshima, Hiroshi Nakashima, Shinji Tomita:
A proposal of self-cleanup cache. PACT 1995: 298-301 - [c15]Jim Tørresen, Hiroshi Nakashima, Shinji Tomita, Olav Landsverk:
General mapping of feed-forward neural networks onto an MIMD computer. ICNN 1995: 1048-1053 - [c14]Hesham Keshk, Shin-ichiro Mori, Hiroshi Nakashima, Shinji Tomita:
Amon: A Parallel Slice Algorithm for Wire Routing. International Conference on Supercomputing 1995: 200-208 - 1993
- [c13]Shin-ichiro Mori, Hideki Saito, Masahiro Goshima, Mamoru Yanagihara, Takashi Tanaka, David Fraser, Kazuki Joe, Hiroyuki Nitta, Shinji Tomita:
A distributed shared memory multiprocessor ASURA: memory and cache architecture. SC 1993: 740-749 - 1992
- [c12]Tetsuo Hironaka, Takashi Hashimoto, Keizo Okazaki, Kazuaki J. Murakami, Shinji Tomita:
Benchmarking a vector-processor prototype based on multithreaded streaming/FIFO vector (MSFV) architecture. ICS 1992: 272-281 - 1991
- [j5]Akira Fukuda, Kazuaki J. Murakami, Shinji Tomita:
Toward advanced parallel processing: exploiting parallelism at task and instruction levels. IEEE Micro 11(4): 16-19 (1991) - [j4]Morihiro Kuga, Kazuaki J. Murakami, Shinji Tomita:
DSNS (dynamically-hazard-resolved statically-code-scheduled, nonuniform superscalar): yet another superscalar processor architecture. SIGARCH Comput. Archit. News 19(4): 14-29 (1991)
1980 – 1989
- 1989
- [j3]Haruo Niimi, Hiroshi Hagiwara, Shinji Tomita:
The structure of experts: A parallel processor system for 3-dimensional graphics. Syst. Comput. Jpn. 20(7): 83-91 (1989) - [c11]Kazuaki J. Murakami, Shin-ichiro Mori, Akira Fukuda, Toshinori Sueyoshi, Shinji Tomita:
The Kyushu University reconfigurable parallel processor: design of memory and intercommunicaiton architectures. ICS 1989: 351-360 - [c10]Kazuaki J. Murakami, Shin-ichiro Mori, Akira Fukuda, Toshinori Sueyoshi, Shinji Tomita:
The Kyushu University Reconfigurable Parallel Processor - Design Philosophy and Architecture. IFIP Congress 1989: 995-1000 - [c9]Kazuaki J. Murakami, Naohiko Irie, Morihiro Kuga, Shinji Tomita:
SIMP (Single Instruction stream/Multiple Instruction Pipelining): A Novel High-Speed Single-Processor Architecture. ISCA 1989: 78-85 - 1988
- [j2]Kazuaki J. Murakami, Akira Fukuda, Toshinori Sueyoshi, Shinji Tomita:
An overview of the Kyushu University reconfigurable parallel processor. SIGARCH Comput. Archit. News 16(4): 130-137 (1988) - 1986
- [c8]Shinji Tomita:
ISDN and X25 - Response. IFIP Congress 1986: 185-188 - [c7]Shinji Tomita, Kiyoshi Shibayama, Toshiyuki Nakata, Shinji Yuasa, Hiroshi Hagiwara:
A Computer with Low-Level Parallelism QA-2: Its Applications to 3-D Graphics and Prolog/Lisp Machines. ISCA 1986: 280-289 - 1984
- [c6]Haruo Niimi, Yoshiro Imai, Masayoshi Murakami, Shinji Tomita, Hiroshi Hagiwara:
A parallel processor system for three-dimensional color graphics. SIGGRAPH 1984: 67-76 - 1983
- [c5]Shinji Tomita, Kiyoshi Shibayama, Toshiaki Kitamura, Toshiyuki Nakata, Hiroshi Hagiwara:
A User-Microprogrammable, Local Host Computer With Low-Level Parallelism. ISCA 1983: 151-157 - 1980
- [j1]Hiroshi Hagiwara, Shinji Tomita, Shigeru Oyanagi, Kiyoshi Shibayama:
A Dynamically Microprogammable Computer with Low-Level Parallelism. IEEE Trans. Computers 29(7): 577-595 (1980) - [c4]Kiyoshi Shibayama, Shinji Tomita, Hiroshi Hagiwara, Katsuhiro Yamazaki, Toshiaki Kitamura:
Performance Evaluation and Improvement of a Dynamically Microprogrammable Computer with Low-Level Parallelism. IFIP Congress 1980: 181-186 - [c3]Shinji Tomita, Kiyoshi Shibayama, Toshiaki Kitamura, Hiroshi Hagiwara:
Performance evaluation and improvement of a dynamically microprogrammable computer with low-level parallelism. MICRO 1980: 79-89
1970 – 1979
- 1977
- [c2]Shinji Tomita, Kiyoshi Shibayama, Shigeru Oyanagi, Hiroshi Hagiwara:
Hardware Organization of a Low Level Parallel Processor. IFIP Congress 1977: 855-860 - 1971
- [c1]Toshiyuki Sakai, Kenji Ohtani, Shinji Tomita:
On-Line, Real-Time, Multiple-Speech Output System. IFIP Congress (1) 1971: 686-690
Coauthor Index
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