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Shen Lin
This is just a disambiguation page, and is not intended to be the bibliography of an actual person. The links to all actual bibliographies of persons of the same or a similar name can be found below. Any publication listed on this page has not been assigned to an actual author yet. If you know the true author of one of the publications listed below, you are welcome to contact us.
Person information
Other persons with the same name
- Shen Lin 0001 — IBM T. J. Watson Research Center, Yorktown Heights, NY, USA (and 1 more)
- Shen Lin 0002 — Nanjing University of Science and Technology, China
- Shen Lin 0003 — SAP Labs, China (and 1 more)
- Shen Lin 0004 — Tsinghua University, Beijing, China
- Shen Lin 0005 — Bell Laboratories, Murray Hill, NJ, USA
- Shen Lin 0006
— Xidian University, State Key Laboratory of Integrated Service Networks (ISN), Xi'an, China
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2020 – today
- 2024
- [j5]Chen Tian, Junyan Zhang, Dayong Liu, Qing Wang, Shen Lin:
Technological topic analysis of standard-essential patents based on the improved Latent Dirichlet Allocation (LDA) model. Technol. Anal. Strateg. Manag. 36(9): 2084-2099 (2024) - 2023
- [c15]Shen Lin
CCA-Secure Identity-Based Matchmaking Encryption from Standard Assumptions. Inscrypt (1) 2023: 253-273 - 2022
- [j4]Juntong Zeng
Optimizing the dynamic treatment regime of in-hospital warfarin anticoagulation in patients after surgical valve replacement using reinforcement learning. J. Am. Medical Informatics Assoc. 29(10): 1722-1732 (2022)
2010 – 2019
- 2015
- [c14]Zhongming Yang, Shen Lin:
A single-pattern matching algorithm base on twice jumps in the intrusion detection systems. FSKD 2015: 2593-2597
2000 – 2009
- 2009
- [c13]Daisuke Kosaka, Yoji Bando, Goichi Yokomizo, Kunihiko Tsuboi, Ying Shiun Li, Shen Lin, Makoto Nagata
A full chip integrated power and substrate noise analysis framework for mixed-signal SoC design. CICC 2009: 219-222 - [c12]Kai Wang, Aveek Sarkar, Norman Chang, Shen Lin:
Early analysis for power distribution networks. ISPD 2009: 3-4 - 2007
- [c11]Aveek Sarkar, Shen Lin, Kai Wang:
A methodology for analysis and verification of power gated circuits with correlated results. ISLPED 2007: 351-354 - 2004
- [c10]Shen Lin, Makoto Nagata
Full-chip vectorless dynamic power integrity analysis and verification against 100uV/100ps-resolution measurement. CICC 2004: 509-512 - 2002
- [j3]Yu Cao, Xuejue Huang, N. H. Chang, Shen Lin, O. Sam Nakagawa, Weize Xie, Dennis Sylvester, Chenming Hu:
Effective on-chip inductance modeling for multiple signal lines and application to repeater insertion. IEEE Trans. Very Large Scale Integr. Syst. 10(6): 799-805 (2002) - 2001
- [c9]Shen Lin, Norman Chang:
Challenges in Power-Ground Integrity. ICCAD 2001: 651- - [c8]Yu Cao, Xuejue Huang, Chenming Hu, Norman Chang, Shen Lin, O. Sam Nakagawa, Weize Xie:
Effective On-chip Inductance Modeling for Multiple Signal Lines and Application on Repeater Insertion. ISQED 2001: 185-190 - [c7]Zhenyu Tang, Lei He, Norman Chang, Shen Lin, Weize Xie, O. Sam Nakagawa:
Instruction Prediction for Step Power Reduction. ISQED 2001: 211-216 - 2000
- [c6]Norman Chang, Shen Lin, O. Sam Nakagawa, Weize Xie, Lei He:
Clocktree RLC Extraction with Efficient Inductance Modeling. DATE 2000: 522-526 - [c5]Zhiping Yu, Dan Yergeau, Robert W. Dutton, O. Sam Nakagawa, Norman Chang, Shen Lin, Weize Xie:
Full Chip Thermal Simulation. ISQED 2000: 145-150 - [c4]Shen Lin, Norman Chang, O. Sam Nakagawa:
Quick On-Chip Self- and Mutual-Inductance Screen. ISQED 2000: 513- - [c3]Zhenyu Tang, Norman Chang, Shen Lin, Weize Xie, O. Sam Nakagawa, Lei He:
Ramp Up/Down Functional Unit to Reduce Step Power. PACS 2000: 13-24
1990 – 1999
- 1999
- [c2]Lei He, Norman Chang, Shen Lin, O. Sam Nakagawa:
An efficient inductance modeling for on-chip interconnects. CICC 1999: 457-460 - 1994
- [c1]Shen Lin, C. K. Wong:
Process-variation-tolerant clock skew minimization. ICCAD 1994: 284-288
1970 – 1979
- 1973
- [j2]Shen Lin, Brian W. Kernighan:
An Effective Heuristic Algorithm for the Traveling-Salesman Problem. Oper. Res. 21(2): 498-516 (1973) - 1970
- [j1]Brian W. Kernighan, Shen Lin:
An efficient heuristic procedure for partitioning graphs. Bell Syst. Tech. J. 49(2): 291-307 (1970)
Coauthor Index
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