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Choungki Song
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2020 – today
- 2023
- [j2]Dae-Han Kwon
, Seongju Lee, Kyuyoung Kim, Sanghoon Oh, Joonhong Park, Gimoon Hong, Dongyoon Ka, Kyu-Dong Hwang
A 1ynm 1.25V 8Gb 16Gb/s/Pin GDDR6-Based Accelerator-in-Memory Supporting 1TFLOPS MAC Operation and Various Activation Functions for Deep Learning Application. IEEE J. Solid State Circuits 58(1): 291-302 (2023) - 2022
- [c6]Seong Ju Lee, Kyu-Young Kim, Sanghoon Oh, Joonhong Park, Gimoon Hong, Dong Yoon Ka, Kyu-Dong Hwang, Jeongje Park, Kyeong Pil Kang, Jungyeon Kim, Junyeol Jeon, Nahsung Kim, Yongkee Kwon, Kornijcuk Vladimir, Woojae Shin, Jongsoon Won, Minkyu Lee, Hyunha Joo, Haerang Choi, Jaewook Lee, Donguc Ko, Younggun Jun, Keewon Cho, Ilwoong Kim, Choungki Song, Chunseok Jeong, Dae-Han Kwon, Jieun Jang, Il Park, Junhyun Chun, Joohwan Cho:
A 1ynm 1.25V 8Gb, 16Gb/s/pin GDDR6-based Accelerator-in-Memory supporting 1TFLOPS MAC Operation and Various Activation Functions for Deep-Learning Applications. ISSCC 2022: 1-3 - 2020
- [c5]Mingxuan He, Choungki Song, Ilkon Kim, Chunseok Jeong, Seho Kim, Il Park, Mithuna Thottethodi
Newton: A DRAM-maker's Accelerator-in-Memory (AiM) Architecture for Machine Learning. MICRO 2020: 372-385
2010 – 2019
- 2019
- [c4]Nam Sung Kim, Choungki Song, Woo Young Cho, Jian Huang, Myoungsoo Jung:
LL-PCM: Low-Latency Phase Change Memory Architecture. DAC 2019: 14 - 2018
- [c3]Amir Yazdanbakhsh
In-DRAM near-data approximate acceleration for GPUs. PACT 2018: 34:1-34:14 - 2016
- [j1]Bingchao Li, Choungki Song, Jizeng Wei, Jung Ho Ahn
Exploring new features of high-bandwidth memory for GPUs. IEICE Electron. Express 13(14): 20160527 (2016) - [c2]Bhargava Gopireddy, Choungki Song, Josep Torrellas, Nam Sung Kim, Aditya Agrawal, Asit K. Mishra:
ScalCore: Designing a core for voltage scalability. HPCA 2016: 681-693 - 2012
- [c1]Kibong Koo, Sunghwa Ok, Yonggu Kang, Seungbong Kim, Choungki Song, Hyeyoung Lee, Hyungsoo Kim, Yongmi Kim, Jeonghun Lee, Seunghan Oak, Yosep Lee, Jungyu Lee, Joongho Lee, Hyungyu Lee, Jaemin Jang, Jongho Jung, Byeongchan Choi, Yong-Ju Kim, Youngdo Hur, Yunsaing Kim, Byong-Tae Chung, Yongtak Kim:
A 1.2V 38nm 2.4Gb/s/pin 2Gb DDR4 SDRAM with bank group and ×4 half-page architecture. ISSCC 2012: 40-41
Coauthor Index
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