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Hongchin Lin
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2010 – 2019
- 2016
- [j9]Roger Yubtzuan Chen, Zong-Yi Yang, Hongchin Lin:
High-Performance Regulated Charge Pump with an Extended Range of Load Current. IEICE Trans. Electron. 99-C(1): 143-146 (2016) - 2015
- [j8]Chang-Kun Yao, Yun-Ching Tang, Hongchin Lin:
Energy-Efficient and Area-Efficient QC-LDPC with RS Decoders Using 2M-LMSA. J. Circuits Syst. Comput. 24(2): 1550026:1-1550026:15 (2015) - 2014
- [c11]ChihYang Huang, Hongchin Lin, Chia-You Wu:
High-voltage tolerant circuit design for fully CMOS compatible multiple-time programmable memories. ISCAS 2014: 1949-1952 - 2013
- [j7]Yun-Ching Tang, Jianwei Chen, Hongchin Lin:
Area-efficient high-throughput parallel scramblers using generalized algorithms. IEICE Electron. Express 10(23): 20130701 (2013) - [j6]Yun-Ching Tang, Hong-Ren Wang, Hongchin Lin, Jun-Zhe Huang:
Design of an Area-Efficient High-Throughput Shift-Based LDPC decoder. J. Circuits Syst. Comput. 22(6) (2013) - 2012
- [c10]Boy-Yiing Jaw, Hongchin Lin:
An analysis of output ripples for PMOS charge pumps and design methodology. APCCAS 2012: 424-427 - 2011
- [j5]Chao-Jui Liang, Chiu-Chiao Chung, Hongchin Lin:
A low-voltage band-gap reference circuit with second-order analyses. Int. J. Circuit Theory Appl. 39(12): 1247-1256 (2011) - 2010
- [c9]Jianwei Chen, Hongchin Lin, Yun-Ching Tang:
Efficient high-throughput architectures for high-speed parallel scramblers. ISCAS 2010: 441-444
2000 – 2009
- 2007
- [j4]Chiu-Chiao Chung, Hongchin Lin, Yen-Tai Lin:
A Multilevel Read and Verifying Scheme for Bi-NAND Flash Memories. IEEE J. Solid State Circuits 42(5): 1180-1188 (2007) - 2006
- [j3]Po-Hsuan Huang, Hongchin Lin, Yen-Tai Lin:
A Simple Subthreshold CMOS Voltage Reference Circuit With Channel- Length Modulation Compensation. IEEE Trans. Circuits Syst. II Express Briefs 53-II(9): 882-885 (2006) - 2005
- [j2]Chiu-Chiao Chung, Hongchin Lin, Yen-Tai Lin:
A novel high-speed sense amplifier for Bi-NOR flash memories. IEEE J. Solid State Circuits 40(2): 515-522 (2005) - [c8]Hongchin Lin, Chao-Jui Liang:
A sub-1V bandgap reference circuit using subthreshold current. ISCAS (5) 2005: 4253-4256 - 2004
- [c7]Ming-Chih Hsieh, Zheng-Hong Wang, Hongchin Lin, Yen-Tai Lin:
A new dual pumping circuit without body effects for low supply voltage. ISCAS (2) 2004: 621-624 - 2003
- [c6]Hsin-Lei Lin, Robert Chen-Hao Chang, Chih-Hao Huang, Hongchin Lin:
A flexible design of a decision feedback equalizer and a novel CCK technique for wireless LAN systems. ISCAS (2) 2003: 153-156 - 2002
- [j1]Hongchin Lin, Nai-Hsien Chen, Jainhao Lu:
Design of Modified Four-Phase CMOS Charge Pumps for Low-Voltage Flash Memories. J. Circuits Syst. Comput. 11(4): 393-404 (2002) - [c5]Dingtzay Chen, Hongchin Lin:
An 1 V rail-rail low-power CMOS op-amp. ISCAS (1) 2002: 309-312 - 2001
- [c4]Hongchin Lin, Yi-Fan Chen, Hsien-Chih She:
A low-power 3-phase half rail pass-gate differential logic. ISCAS (4) 2001: 148-151 - [c3]Hongchin Lin, Nai-Hsien Chen:
New four-phase generation circuits for low-voltage charge pumps. ISCAS (1) 2001: 504-507 - 2000
- [c2]Hongchin Lin, Jie-Hau Huang, Shyh-Chyi Wong:
A simple high-speed low current comparator. ISCAS 2000: 713-716
1990 – 1999
- 1999
- [c1]Hongchin Lin, Kai-Hsun Chang, Shyh-Chyi Wong:
Novel high positive and negative pumping circuits for low supply voltage. ISCAS (1) 1999: 238-241
Coauthor Index
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