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IEEE Design & Test, Volume 39
Volume 39, Number 1, February 2022
- Jörg Henkel:
Designing Autonomous Systems. 4 - Selma Saidi, Dirk Ziegenbein
, Jyotirmoy V. Deshmukh
Guest Editors' Introduction: Special Issue on Autonomous Systems Design. 5-7 - Selma Saidi
Autonomous Systems Design: Charting a New Discipline. 8-23 - Hoang-Dung Tran
Verification Approaches for Learning-Enabled Autonomous Cyber-Physical Systems. 24-34 - Nicola Capodieci
Real-Time Requirements for ADAS Platforms Featuring Shared Memory Hierarchies. 35-41 - Nima Taherinejad
Autonomous Systems, Trust, and Guarantees. 42-48 - David Harel, Assaf Marron
Creating a Foundation for Next-Generation Autonomous Systems. 49-56 - Fayu Wan
Design and Test of Innovative Three-Couplers-Based Bandpass Negative Group Delay Active Circuit. 57-66 - Blaise Ravelo
Design and Test of Crab-Shaped Negative Group Delay Circuit. 67-76 - Jean Bruant
Toward Agile Hardware Designs With Chisel: A Network Use Case. 77-84 - Mahesh Chandra
A Novel Method for Scalable VLSI Implementation of Hyperbolic Tangent Function. 85-91 - Yiran Chen
ISLPED 2021: The 25th Anniversary! 92-93 - Andreas Gerstlauer
Report on the 2021 Embedded Systems Week (ESWEEK). 94-96 - Harry Foster, Rob Oshana, Jörg Henkel, Vivek De:
Report on the Design Automation Conference (DAC 2021). 97-99 - Theo Theocharides
TTTC News. 100-101 - Scott Davidson
25 Years (and a Bit More) of The Last Byte. 102
Volume 39, Number 2, April 2022
- Partha Pratim Pande
Special Issue on Near-Memory and In-Memory Processing. 4 - Fernando Gehm Moraes
Guest Editors' Introduction: SBCCI 2020. 5-6 - Victor Oliveira Costa
Dedicated Shapelet Distance Engine for Time-Series Classification. 7-14 - Felipe G. A. e Silva, Adahil Muniz
Expanding Column Line Code Adaptive (CLC-A) for Protecting 32-and 64-Bit Data. 15-22 - Julio Saraçol Domingues Júnior
Migortho: A Design Automation Flow for QCA Circuits. 23-30 - Talita Alves Borges
Accuracy-Configurable 2-D Gaussian Filter Architecture for Energy-Efficient Image Processing. 31-37 - Luiz Neto, Marcel Moscarelli Corrêa, Daniel Palomino
Power-Quality Configurable Hardware Design for AV1 Directional Intraframe Prediction. 38-45 - Hai Li
Guest Editors' Introduction: Near-Memory and In-Memory Processing. 46-47 - Hongwu Jiang
Analog-to-Digital Converter Design Exploration for Compute-in-Memory Accelerators. 48-55 - Qingrong Huang
Computing-In-Memory Using Ferroelectrics: From Single- to Multi-Input Logic. 56-64 - Chenfeng Zhao
Executing Data Integration Effectively and Efficiently Near the Memory. 65-73 - Haoran Lyu, Fengwei An
A 703.4-GOPs/W Binary SegNet Processor With Computing-Near-Memory Architecture for Road Detection. 74-83 - Parham Sadeghi
A Case for PIM Support in General-Purpose Compilers. 84-89 - Felix Staudigl
A Survey of Neuromorphic Computing-in-Memory: Architectures, Simulators, and Security. 90-99 - Jiaji He
EM Side Channels in Hardware Security: Attacks and Defenses. 100-111 - Reza Ghanaatian
Design for Test With Unreliable Memories by Restoring the Beauty of Randomness. 112-120 - Rémy Vauché
Bandpass NGD Time- Domain Experimental Test of Double-Li Microstrip Circuit. 121-128 - Theo Theocharides
TTTC News. 129-130 - Scott Davidson
The Memory Shuffle. 131
Volume 39, Number 3, June 2022
- Partha Pratim Pande
Special Issue on Benchmarking Machine Learning Systems and Applications. 4 - Sai Manoj Pudukotai Dinakarrao
Guest Editors' Introduction: Special Issue on Benchmarking Machine Learning Systems and Applications. 5-7 - Hao Kong
EDLAB: A Benchmark for Edge Deep Learning Accelerators. 8-17 - Geoffrey W. Burr
Fair and Comprehensive Benchmarking of Machine Learning Processing Chips. 18-27 - Michaela Blott
Evaluating Theoretical Baselines for ML Benchmarking Across Different Accelerators. 28-36 - Aidin Shiri
A Hardware Accelerator for Language-Guided Reinforcement Learning. 37-44 - Seyed Ahmad Mirsalari
FaCT-LSTM: Fast and Compact Ternary Architecture for LSTM Recurrent Neural Networks. 45-53 - Amid Mozelli
A Study on Confidence: An Unsupervised Multiagent Machine Learning Experiment. 54-62 - Amira Guesmi
SIT: Stochastic Input Transformation to Defend Against Adversarial Attacks on Deep Neural Networks. 63-72 - Aditya Lohana
Efficient Privacy-Aware Federated Learning by Elimination of Downstream Redundancy. 73-81 - Arnab Neelim Mazumder
Automatic Detection of Respiratory Symptoms Using a Low-Power Multi-Input CNN Processor. 82-90 - Sathwika Bavikadi
A Survey on Machine Learning Accelerators and Evolutionary Hardware Platforms. 91-116 - Michele Portolan
Flexible and Portable Management of Secure Scan Implementations Exploiting P1687.1 Extensions. 117-124 - Hala Youssef Darweesh
Self-Healing of Redundant FLASH ADCs. 125-133 - Stefano Di Carlo
TTTC News. 134-136 - Scott Davidson
Benchmarking Benchmarking. 137
Volume 39, Number 4, August 2022
- Partha Pratim Pande
Special Issue on 2021 Top Picks in Hardware and Embedded Security. 4 - Srini Devadas, Jeyavijayan Rajendran
Guest Editors' Introduction: Special Issue on 2021 Top Picks in Hardware and Embedded Security. 5-6 - Lejla Batina, Shivam Bhasin
SCA Strikes Back: Reverse-Engineering Neural Network Architectures Using Side Channels. 7-14 - Weizhe Hua
Reverse-Engineering CNN Models Using Side-Channel Attacks. 15-22 - Charalambos Konstantinou
HPC-Based Malware Detectors Actually Work: Transition to Practice After a Decade of Research. 23-32 - Jonas Krautter
Remote Fault Attacks in Multitenant Cloud FPGAs. 33-40 - Ilias Giechaskiel
Long-Wire Leakage: The Threat of Crosstalk. 41-48 - Mohammadkazem Taram
Mitigating Speculative Execution Attacks via Context-Sensitive Fencing. 49-57 - Wei-Hao Chen, Shi-Yu Huang
On-Chip Jitter Learning for PLL. 58-63 - Mahesh Chandra
On the Implementation of Fixed-Point Exponential Function for Machine Learning and Signal- Processing Accelerators. 64-70 - Sai Kiran Cherupally
Improving DNN Hardware Accuracy by In-Memory Computing Noise Injection. 71-80 - Dinesh Ganesan
Graph-Based Circuit Simulator for Switched Capacitor Circuits. 81-89 - Cristiana Bolchini
DATE 2022: Aiming for an Online/ Onsite Format and Finally Moving to Online Only. 90-93 - Scott Davidson
Security Arms Race. 94
Volume 39, Number 5, October 2022
- Partha Pratim Pande
Special Issue on Design and Test of Multidie Packages. 4 - Adam Cron, Hailong Jiao, Erik Jan Marinissen:
Guest Editors' Introduction: Special Issue on Design and Test of Multidie Packages. 5-6 - Teresa McLaurin, Adam Cron:
Applying IEEE Test Standards to Multidie Designs. 7-16 - Jean-François Côté
Affordable and Comprehensive Testing of 3-D Stacked Die Devices. 17-25 - Chen Wei
A Global Self-Repair Method for TSV Arrays With Adaptive FNS-CAC Codec. 26-33 - Tianming Ni
Broadcast-TDMA: A Cost-Effective Fault-Tolerance Method for TSV Lifetime Reliability Enhancement. 34-42 - Roman Pawelczyk
Improvement of Functional Safety of the Level-Crossing Barrier Machine by a Noninvasive Angle-Detection Method. 43-53 - Donghyun Kang
Datapath Extension of NPUs to Support Nonconvolutional Layers Efficiently. 54-61 - Nhat-An Nguyen
An Attachable Battery-Supercapacitor Hybrid for Large Pulsed Load. 62-69 - Andrew B. Kahng
RosettaStone: Connecting the Past, Present, and Future of Physical Design Research. 70-78 - Kazuki Monta
Testing Embedded Toggle Generation Through On-Chip IR-Drop Measurements. 79-87 - Marshal Raj
Majority-Logic-Based Self-Checking Adder in Quantum-Dot Cellular Automata. 88-97 - Scott Davidson
Standing on the Shoulders of ... 98
Volume 39, Number 6, December 2022
- Partha Pratim Pande
Special Issue on NOCS 2022. 4 - Hao Luan
A Many-Ported and Shared Memory Architecture for High-Performance ADAS SoCs. 5-15 - Uday Mallappa
JARVA: Joint Application-Aware Oblivious Routing and Static Virtual Channel Allocation. 16-27 - Chamika Sudusinghe
Eavesdropping Attack Detection Using Machine Learning in Network-on-Chip Architectures. 28-38 - Bharat Bisht, Shirshendu Das
BHT-NoC: Blaming Hardware Trojans in NoC Routers. 39-47 - Zhiqiang Chen
Traversal Packets: Opportunistic Bypass Packets for Deadlock Recovery. 48-57 - Neiel Leyva
SynFull-RTL: Evaluation Methodology for RTL NoC Designs. 58-69 - Vida Sobhani
Deadlock-Freedom in Computational Neuroscience Simulators. 70-78 - Zhenmin Li
RB-OLITS: A Worst Case Reorder Buffer Size Reduction Approach for 3-D-NoC. 79-89 - Sudeep Pasricha
Electronic, Wireless, and Photonic Network-on-Chip Security: Challenges and Countermeasures. 90-98 - Chixiao Chen
Design Challenges of Intrachiplet and Interchiplet Interconnection. 99-109 - Cláudio Machado Diniz
Guest Editors' Introduction: SBCCI 2021. 110 - Freddy Gabbay
A Design Flow and Tool for Avoiding Asymmetric Aging. 111-118 - Jiovana Sousa Gomes
Low-Power High-Throughput Architecture for AV1 Arithmetic Decoder. 119-127 - Tulio Pereira Bitencourt
Power-Saving 8K Real-Time AV1 Arithmetic Encoder Architecture. 128-137 - Michael Guilherme Jordan
ERIN: Energy-Aware Resource-Provisioning Framework for CPU-FPGA Multitenant Environment. 138-146 - Maria D. Vieira
Three-Input NPN Class Gate Library for Atomic Silicon Quantum Dots. 147-155 - M. Shafkat M. Khan
Secure Interposer-Based Heterogeneous Integration. 156-164 - Zhongbao Wang
Large Power Division Ratio Branch-Line Coupler With Differential Through and Differential to Single-Ended Coupling. 165-171 - Liton Kumar Biswas
On Backside Probing Techniques and Their Emerging Security Threats. 172-179 - Scott Davidson
Small Is Good. 180
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