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IEEE Computer Architecture Letters, Volume 19

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Volume 19, Number 1, January - June 2020

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Ki-Dong Kang, Gyeongseo Park, Nam Sung Kim, Daehoon Kim:
Network Packet Processing Mode-Aware Power Management for Data Center Servers. 1-4
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Mustafa Cavus, Mohammed Shatnawi, Resit Sendag, Augustus K. Uht:
Exploring Prefetching, Pre-Execution and Branch Outcome Streaming for In-Memory Database Lookups. 5-8
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Rahul Bodduna, Vinod Ganesan, Patanjali SLPSK, Kamakoti Veezhinathan, Chester Rebeiro:
Brutus: Refuting the Security Claims of the Cache Timing Randomization Countermeasure Proposed in CEASER. 9-12
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Minsub Kim, Jaeha Kung, Sungjin Lee:
Towards Scalable Analytics with Inference-Enabled Solid-State Drives. 13-17
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Congmiao Li, Jean-Luc Gaudiot:
Challenges in Detecting an "Evasive Spectre". 18-21
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Mingyu Yan, Zhaodong Chen, Lei Deng, Xiaochun Ye, Zhimin Zhang, Dongrui Fan, Yuan Xie:
Characterizing and Understanding GCNs on GPU. 22-25
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Chanchal Kumar, Aayush Chaudhary, Shubham Bhawalkar, Utkarsh Mathur, Saransh Jain, Adith Vastrad, Eric Rotenberg:
Post-Silicon Microarchitecture. 26-29
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Stijn Eyerman, Wim Heirman, Sam Van den Steen, Ibrahim Hur:
Breaking In-Order Branch Miss Recovery. 30-33
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Zhi Gang Liu, Paul N. Whatmough, Matthew Mattina:
Systolic Tensor Array: An Efficient Structured-Sparse GEMM Accelerator for Mobile CNN Inference. 34-37
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  - journals/cal/KrishnanWBWFWBR20
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Srivatsan Krishnan, Zishen Wan, Kshitij Bhardwaj, Paul N. Whatmough, Aleksandra Faust, Gu-Yeon Wei, David Brooks, Vijay Janapa Reddi:
The Sky Is Not the Limit: A Visual Performance Model for Cyber-Physical Co-Design in Autonomous Machines. 38-42
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Pierre Michaud:
Exploiting Thermal Transients With Deterministic Turbo Clock Frequency. 43-46
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Zhufei Chu, Huiming Tian, Zeqiang Li, Yinshui Xia, Lun-Yao Wang:
A High-Performance Design of Generalized Pipeline Cellular Array. 47-50
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Lingjun Zhu, Lennart Bamberg, Anthony Agnesina, Francky Catthoor, Dragomir Milojevic, Manu Komalan, Julien Ryckaert, Alberto García-Ortiz, Sung Kyu Lim:
Heterogeneous 3D Integration for a RISC-V System With STT-MRAM. 51-54
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Tony Mason, Thaleia Dimitra Doudali, Margo I. Seltzer, Ada Gavrilovska:
Unexpected Performance of Intel® Optane™ DC Persistent Memory. 55-58
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Zhihui Zhang, Jingwen Leng, Lingxiao Ma, Youshan Miao, Chao Li, Minyi Guo:
Architectural Implications of Graph Neural Networks. 59-62
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Anderson L. Sartor, Anish Krishnakumar, Samet E. Arda, Ümit Y. Ogras, Radu Marculescu:
HiLITE: Hierarchical and Lightweight Imitation Learning for Power Management of Embedded SoCs. 63-67
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Harsh Desai, Brandon Lucia:
A Power-Aware Heterogeneous Architecture Scaling Model for Energy-Harvesting Computers. 68-71
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Bo-Cheng Lai, Chun-Yen Chen, Yi-Da Hsin, Bo-Yen Lin:
A Two-Directional BigData Sorting Architecture on FPGAs. 72-75
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Peng Gu, Benjamin S. Lim, Wenqin Huangfu, Krishna T. Malladi, Andrew Chang, Yuan Xie:
NMTSim: Transaction-Command Based Simulator for New Memory Technology Devices. 76-79
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Seyyed Hossein Seyyedaghaei Rezaei, Mehdi Modarressi, Rachata Ausavarungnirun, Mohammad Sadrosadati, Onur Mutlu, Masoud Daneshtalab:
NoM: Network-on-Memory for Inter-Bank Data Transfer in Highly-Banked Memories. 80-83

Volume 19, Number 2, July - December 2020

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Alberto Ros, Alexandra Jimborean:
The Entangling Instruction Prefetcher. 84-87
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Rahul Singh, Gokul Subramanian Ravi, Mikko H. Lipasti, Joshua San Miguel:
Value Locality Based Approximation With ODIN. 88-91
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Jie Zhang, Miryeong Kwon, Sanghyun Han, Nam Sung Kim, Mahmut T. Kandemir, Myoungsoo Jung:
FastDrain: Removing Page Victimization Overheads in NVMe Storage Stack. 92-96
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Junsu Im, Hanbyeol Kim, Yumin Won, Jiho Oh, Minjae Kim, Sungjin Lee:
Probability-Based Address Translationfor Flash SSDs. 97-100
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Ahmed Samara, James Tuck:
The Case for Domain-Specialized Branch Predictors for Graph-Processing. 101-104
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Reza Mirosanlou, Danlu Guo, Mohamed Hassan, Rodolfo Pellizzoni:
MCsim: An Extensible DRAM Memory Controller Simulator. 105-109
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Shang Li, Zhiyuan Yang, Dhiraj Reddy, Ankur Srivastava, Bruce L. Jacob:
DRAMsim3: A Cycle-Accurate, Thermal-Capable DRAM Simulator. 110-113
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Joo Hwan Lee, Hui Zhang, Veronica Lagrange Moutinho dos Reis, Praveen Krishnamoorthy, Xiaodong Zhao, Yang-Seok Ki:
SmartSSD: FPGA Accelerated Near-Storage Data Analytics on SSD. 114-117
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Purab Ranjan Sutradhar, Mark Connolly, Sathwika Bavikadi, Sai Manoj Pudukotai Dinakarrao, Mark A. Indovina, Amlan Ganguly:
pPIM: A Programmable Processor-in-Memory Architecture With Precision-Scaling for Deep Learning. 118-121
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Wonkyo Choe, Jonghyeon Kim, Jeongseob Ahn:
A Study of Memory Placement on Hardware-Assisted Tiered Memory Systems. 122-125
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Nada Lachtar, Abdulrahman Abu Elkhail, Anys Bacha, Hafiz Malik:
A Cross-Stack Approach Towards Defending Against Cryptojacking. 126-129
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Fatemeh Golshan, Mohammad Bakhshalipour, Mehran Shakerinava, Ali Ansari, Pejman Lotfi-Kamran, Hamid Sarbazi-Azad:
Harnessing Pairwise-Correlating Data Prefetching With Runahead Metadata. 130-133
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Nikita Lazarev, Neil Adit, Shaojie Xiang, Zhiru Zhang, Christina Delimitrou:
Dagger: Towards Efficient RPCs in Cloud Microservices With Near-Memory Reconfigurable NICs. 134-138
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Ali Jahanshahi, Hadi Zamani Sabzi, Chester Lau, Daniel Wong:
GPU-NEST: Characterizing Energy Efficiency of Multi-GPU Inference Servers. 139-142
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  - journals/cal/MikhailenkoNFI20
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Darya Mikhailenko, Yujin Nakamoto, Ben Feinberg, Engin Ipek:
Adapting In Situ Accelerators for Sparsity with Granular Matrix Reordering. 143-146
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Yasuo Ishii, Jaekyu Lee, Krishnendra Nathella, Dam Sunwoo:
Rebasing Instruction Prefetching: An Industry Perspective. 147-150
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Newton, Virendra Singh, Trevor E. Carlson:
PIM-GraphSCC: PIM-Based Graph Processing Using Graph's Community Structures. 151-154
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Zamshed I. Chowdhury, S. Karen Khatamifard, Zhaoyong Zheng, Tali Moreshet, R. Iris Bahar, Ulya R. Karpuzcu:
Voltage Noise Mitigation With Barrier Approximation. 155-158
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Ferdous Sharifi, Nezam Rohbani, Shaahin Hessabi:
Aging-Aware Context Switching in Multicore Processors Based on Workload Classification. 159-162
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Yuezhi Che, Yuanzhou Yang, Amro Awad, Rujia Wang:
A Lightweight Memory Access Pattern Obfuscation Framework for NVM. 163-166
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Elaheh Sadredini, Reza Rahimi, Kevin Skadron:
Enabling In-SRAM Pattern Processing With Low-Overhead Reporting Architecture. 167-170

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