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ISOCC 2020: Yeosu, South Korea
- International SoC Design Conference, ISOCC 2020, Yeosu, South Korea, October 21-24, 2020. IEEE 2020, ISBN 978-1-7281-8331-2
- Soonsung Ahn, Jaegeun Song, Chaegang Lim, Yohan Choi, Sooho Park, Yunsoo Park, Chulwoo Kim:
A 1 MS/s 9.15 ENOB Low-Power SAR ADC with Triple-Charge-Sharing Technique. 1-2 - Tae-Gwan Kim, Kang-Il Cho, Ho-Jin Kim, Jun-Ho Boo, Yong-Sik Kwak, Gil-Cho Ahn:
A Third-Order DT Delta-Sigma Modulator With Noise-Coupling Technique. 3-4 - Seunghan Baek, Sunmean Kim
, Youngchang Choi, Seokhyeong Kang:
MTCMOS-based Ternary to Binary Converter. 5-6 - Yuanyang Du, Xueyan Bai, Manato Hirai, Shuhei Yamamoto, Anna Kuwana, Haruo Kobayashi, Kazuyoshi Kubo:
Digital-to-Analog Converter Architectures Based on Polygonal and Prime Numbers. 7-8 - Manato Hirai, Hiroshi Tanimoto, Yuji Gendai, Shuhei Yamamoto, Anna Kuwana, Haruo Kobayashi:
Nonlinearity Analysis of Resistive Ladder-Based Current-Steering Digital-to-Analog Converter. 9-10 - Pradeep K, Mohith B, Manjunath K. P, Sunita M. S
Comparative analysis of FinFET and Planar MOSFET SRAMs. 11-12 - Duheon Choi, Kwangsu Kim, Eui-Young Chung:
Asymmetric Prefetching Architecture for Multicore Processor. 13-14 - Karthik S, Karthick D, Sanjaya M. V, Madhav Rao:
Design and Implementation of a Low Power Ternary Content Addressable Memory (TCAM). 15-16 - Jorge Cañada
An On-Chip Scalable Low Power Consumption High-Voltage Driver Based on Standard CMOS Technology. 17-18 - Kwanho Bae, Jongsun Park:
Efficient TSV Fault Detection Scheme For High Bandwidth Memory Using Pattern Analysis. 19-20 - Shreyas K. Venkataramanaiah, Shihui Yin, Yu Cao, Jae-Sun Seo:
Deep Neural Network Training Accelerator Designs in ASIC and FPGA. 21-22 - Ji-Hoon Bae, Joon Hyeon Park, Jin-Hyeok Park, Myung Hoon Sunwoo:
Multi-Channel Input Deep Convolutional Neural Network for Mammogram Diagnosis. 23-24 - Kensuke Iizuka, Kohei Ito, Kazuei Hironaka, Hideharu Amano:
A Method of Partitioning Convolutional Layer to Multiple FPGAs. 25-26 - Wun-Siou Jhong, Shao-I Chu, Yu-Jung Huang, Tsun-Yi Hsu, Wei-Chen Lin, Pokai Huang, Jia-Jung Wang:
Deep Learning Hardware/Software Co-Design for Heart Sound Classification. 27-28 - Wei-Chih Li, Cheng-Jie Yang, Wai-Chi Fang:
A Real-time Emotion Recognition System Based on an AI System-On-Chip Design. 29-30 - Raymond Gyaang
Design and Validation of a Blocker Rejection LNA with On-Chip Dual-Notch Filters. 31-32 - SeoHyeong Jeong, Dongmin Kim, Donggu Im:
A Baseband Analog Spectrum Sensing Unit Employing Super Source Follower-Based Channel Selection Filters. 33-34 - Baek Hwan Kim, Kang-Yoon Lee:
ASK Modulator Spur reduction using Sigma Delta Modulator and Oscillator. 35-36 - Muhammad Basim, Danial Khan, Qurat Ul Ain, Khuram Shehzad, Muhammad Asif, Kang-Yoon Lee:
A High Efficient RF-DC Converter for RF Energy Harvesting Applications. 37-38 - JoonHong Park, David Kim, Ree Jin Joe, JongWan Jo, YoungGun Pu, Kang-Yoon Lee:
Multi-band PLL for RF wireless charger at 2.4 GHz and 5.8 GHz. 39-40 - Woosong Jung, Jinhyung Lee, Kwangho Lee, Hyojun Kim, Deog-Kyoon Jeong:
A 8.4Gb/s Low Power Transmitter with 1.66 pJ/b using 40: 1 Serializer for DisplayPort Interface. 41-42 - Daehyun Koh, Dainel Jeong, Jeongho Hwang, Deog-Kyoon Jeong:
Optical Receiver Front-end for Active Optical Cable in 180 nm CMOS. 43-44 - Eun-Young Jung, Won-Young Lee:
A Fast Locking Duty Cycle Corrector with High Accuracy. 45-46 - Sean Kane Lloyd M. Quintans, Francesca Bea V. Narcida, Janelle Eira A. Tordesillas, Maria Patricia Rouelli G. Sabino, Anastacia B. Alvarez, Maria Theresa G. de Leon, John Richard E. Hizon, Christopher G. Santos, Marc D. Rosales:
5 Gb/s Optical Transceiver for MEMS Tunable HCG-VCSEL in 65 nm CMOS. 47-48 - Daewon Rho, Minkyu Kim, Hyun-Kyu Kim
Performance Optimization of Silicon Photonic Ring Switch with CMOS Driver. 49-50 - Hayoung Lee
Redundancy Analysis Optimization with Clustered Known Solutions for High Speed Repair. 51-52 - Jungyun Choi, Kyungsu Kang, Sangho Park, Seunghan Lee, YoHan Park, Byeongwook Bae, Byunghoon Lee, ByungChul Yoo:
On-chip Interconnect Optimization and Validation using Virtual Platform. 53-54 - Takuma Hikida, Hiroki Nishikawa, Hiroyuki Tomiyama:
Heuristic Algorithms for Dynamic Scheduling of Moldable Tasks. 55-56 - Hyeonchan Lim, Tae Hyun Kim, Seunghwan Kim, Sungho Kang:
Diagnosis of Scan Chain Faults Based-on Machine-Learning. 57-58 - Seung-Yeong Lee, Jae-Hyoung Lee, Hyeonguk Jang, Woojoo Lee:
A Framework for Detecting the Presence of an Unattended Child in a Vehicle. 59-60 - Ashutosh Mishra
An Intelligent In-cabin Monitoring System in Fully Autonomous Vehicles. 61-62 - Mehdi Nasrollahpour, Alexei Matyushov, Mohsen Zaeimbashi, Nian Xiang Sun
A Low Noise MEMS Based CMOS Resonator Using Magnetoelectric Sensor. 63-64 - Yusuke Hirota, Ittetsu Taniguchi, Takao Onoye:
Parallelization of Local Path Planning for High Reliable Autonomous Drones. 67-68 - Jungwon Lee, Hyoju Seo, Yerin Kim, Yongtae Kim:
Design of a Low-Cost Approximate Adder with a Zero Truncation. 69-70 - Mohammed E. Elbtity, Hyun-Wook Son, Dong-Yeong Lee, HyungWon Kim:
High Speed, Approximate Arithmetic Based Convolutional Neural Network Accelerator. 71-72 - Seokho Lee, Youngmin Kim:
Booth Fusion: Efficient Bit Fusion Multiplier with Booth Encoding. 73-74 - Sunghyun Choi, Jongsun Park:
Early Termination of STDP Learning with Spike Counts in Spiking Neural Networks. 75-76 - Hee-Yeon Yang, Yu-Jin Noh, Sung-Ho Lee, Geun-Won Kim, Hang-Geun Jeong, Donggu Im:
A Current-link CMOS Analog Neuron with Simplified Synapse Using a Merged Switch Array. 77-78 - Dongwoo Lew, Jongsun Park:
Early Image Termination Technique During STDP Training of Spiking Neural Network. 79-80 - Renzo Nicolas Alsim, Anastacia Ballesil-Alvarez, Maria Theresa G. de Leon, Marc D. Rosales, Maria Patricia Rouelli Sabino-Santos, Christopher Santos, John Richard E. Hizon:
A Top-Down Approach for Low Noise Amplifier Design using Verilog-A. 81-82 - Zubair Mehmood, Munkyo Seo:
A Wideband Distributed Demodulator at 100 GHz. 83-84 - Zubair Mehmood, Munkyo Seo:
A 100 GHz LO Cancellation Based High Speed OOK Modulator. 85-86 - Byeong Jae Seo, Yun Seong Eo, Seung-Hwan Jung:
A K-band VCO-based Impulse Generator for UWB Radar Sensors. 87-88 - Dong Won Lee, Kang-Yoon Lee:
A Design of 5.8GHz Tunable Band Noise Cancelling CMOS LNA for DSRC Communications. 89-90 - Derek Lin, Jun-Yu Yang, Shi-Yu Huang:
A Voting Phase Detector Design with Mitigated Process Variation. 91-92 - Arriel Ting, Anastacia B. Alvarez, Maria Theresa G. de Leon, Marc D. Rosales, Maria Patricia Rouelli Sabino-Santos, John Richard E. Hizon, Christopher Santos:
Designing a Class E Power Amplifier through Modeling in Verilog-A. 93-94 - Jo Yoshimoto, Ittetsu Taniguchi, Hiroyuki Tomiyama, Takao Onoye:
An Evaluation of Edge Computing Platform for Reliable Automated Drones. 95-96 - Soyeon Choi, Jieun Yeo, Hoyoung Yoo:
Extraction of ROM Data from Bitstream in Xilinx FPGA. 97-98 - Taeyang Jeong, Sangwoo Han, Eui-Young Chung:
A Fast Full-System Simulation Environment for Memory System Evaluation. 99-100 - Robert Chen-Hao Chang
Batteryless DC-DC Boost Converter for Thermoelectric Energy Harvesting Devices. 101-102 - Christian Joseph Dia, Ralfael Himor, Anastacia B. Alvarez, John Richard E. Hizon, Marc D. Rosales, Maria Patricia Rouelli Sabino-Santos, Christopher Santos, Maria Theresa G. de Leon:
An Interface for Shock Inputs in Piezoelectric Energy Harvesting using Synchronous Electric Charge Extraction. 103-104 - Elizabeth Amyouny, Yixuan He, Kyung Ki Kim, Yong-Bin Kim:
Peak Current Control Boost Converter with Time-Multiplex. 105-106 - Qurat ul Ain, Danial Khan, Muhammad Basim, Kang-Yoon Lee:
Design of Current Sensor in COT DC-DC Converter for IoT applications. 107-108 - Sunita M. S
50 MHz 3-Level Buck Converter with added Boost Converter. 109-110 - Rei Yamazaki, Toshiyuki Inoue, Akira Tsuchiya, Keiji Kishine:
Processing Time Reduction for JPEG Compression Using Pixel Array Conversion. 111-112 - Jung Gyu Min, Youngjoo Lee
High-Quality HTTP Live Streaming System for Limited Communication Bandwidth. 113-114 - Joo-Sung Choi, Suk-Ju Kang, Min-Ji Lee, Jun-Young Park, Ji-Won Lee:
Sequential Compression Using Efficient LUT Correlation for Display Defect Compensation. 115-116 - Younggyun Cho, Mi Lu:
A Reconfigurable Approximate Floating-Point Multiplier with kNN. 117-118 - Junghwan Kim, Jongkil Hyun, Byungin Moon
Low-cost Hardware Architecture for Integral Image Generation using Word Length Reduction. 119-120 - Jae-Hun Song, Suk-Ju Kang:
Fast 3D Hand Pose Estimation for Real-time System. 121-122 - Kun-Chih Jimmy Chen
A Two-stage Training Mechanism for the CNN with Trainable Activation Function. 123-124 - Jiayi Liu, Kejie Huang:
A Novel Scheme to Map Convolutional Networks to Network-on-Chip with Computing-In-Memory Nodes. 126-127 - Geonho Kim, Jongsun Park:
Low Cost Early Exit Decision Unit Design for CNN Accelerator. 127-128 - Joongho Jo, Jongsun Park:
Confidence Score based Mini-batch Skipping for CNN Training on Mini-batch Training Environment. 129-130 - Yixuan He, Minsu Choi, Kyung Ki Kim, Yong-Bin Kim:
An Ultra-Low-Power Tunable Bump Circuit using Source-Degenerated Differential Transconductor. 131-132 - Yukiko Shibasaki, Koji Asami, Akemi Hatta, Riho Aoki, Anna Kuwana, Haruo Kobayashi:
Study on Crest Factor Controlled Multi-Tone Signal for Analog RF Circuit Testing. 133-134 - Yudai Abe, Akio Iwabuchi, Jun-Ichi Matsuda, Anna Kuwana, Takashi Ida, Yukiko Shibasaki, Haruo Kobayashi:
Low Power Loss IGBT Driver Circuit Using Current Drive. 135-136 - Souma Yamamoto, Kuswan Isam Ebisawa, Yudai Abe, Takashi Ida, Yukiko Shibasaki, Nobukazu Tsukiji, Anna Kuwana, Haruo Kobayashi, Akira Suzuki, Yukichi Todoroki, Toshihiko Kakinoki, Nobuto Ono, Kazuhiro Miura:
Operation and Stability Analysis of Temperature-Insensitive MOS Reference Current Source with Self-Bias Circuit. 137-138 - Jihye Kim, Hayoung Lee
Memory-like Defect Diagnosis for CMOL FPGAs. 139-140 - Shiyu Yang, Peilin Liu, Jianwei Xue, Rongdi Sun, Rendong Ying:
An Efficient FPGA Implementation of Izhikevich Neuron Model. 141-142 - Hyoju Seo, Yoon Seok Yang, Yongtae Kim:
An Energy-Efficient Imprecise Adder with a Lower-part Constant Approximation. 143-144 - Adrian G. Caburnay, Jonathan Gabriel S. A. Reyes, Anastacia P. Ballesil-Alvarez, Maria Theresa G. de Leon, John Richard E. Hizon, Marc D. Rosales, Christopher G. Santos, Maria Patricia Rouelli G. Sabino:
Design Space Exploration of a 512KB STT-Assisted SOT MRAM Cache. 145-146 - Jooyoon Kim, Jongsun Park:
Variation-Tolerant Separated Pre-Charge Sense Amplifier for Resistive Non-Volatile logic circuit. 147-148 - P. Vijaya Lakshmi
Low Power High Speed Body Driven Comparator for Implantable Electronics. 149-150 - Takashi Hosono, Lei Sha, Souma Yamamoto, Mayu Hirano, Takashi Ida, Anna Kuwana, Haruo Kobayashi, Yoichi Moroshima, Hiromichi Harakawa, Takeshi Oikawa:
Improved Nagata Current Source Insensitive to Temperature and Power Supply Voltage. 151-152 - Hyojun Kim, Jun-Eun Park, Deog-Kyoon Jeong:
An Area-Efficient Temperature Compensated Sub-Threshold CMOS Voltage Reference. 153-154 - Malik Summair Asghar, Saad Arslan, HyungWon Kim:
Low Power Spiking Neural Network Circuit with Compact Synapse and Neuron Cells. 157-158 - Giuseppe Coviello, Gianfranco Avitabile, Antonello Florio:
The Effects of Timing Error Sources in Wireless Multi-Unit Off-Line Acquisition Systems. 159-160 - Yu Du, Ka Lok Man, Eng Gee Lim:
Image Radar-based Traffic Surveillance System: An all-weather sensor as intelligent transportation infrastructure component. 161-162 - Zong Jie Shen
Bionic Sypantic Application of OxRRAM Devices. 163-164 - Ziqiang Bi, Jieming Ma, Ka Lok Man, Yong Yue
A Novel Global Maximum Power Point Tracking Technique based on Shading Detection for Photovoltaic Strings. 165-166 - Antonello Florio
The Impact of Coherent Signal Reception on Interferometric Angle of Arrival Estimation. 167-168 - Shinyoung Kang, Juyoung Lee, Yunheub Song:
Investigation on Synaptic Characteristics of Interfacial Phase Change Memory for Artificial Synapse Application. 169-170 - Van Loi Le, Taegeun Yoo, Ju Eon Kim, Kwang-Hyun Baek, Tony Tae-Hyoung Kim:
A Low-Power Smart Gesture Sensing SoC with On-chip Image Sensor for Smart Devices. 171-172 - Weng-Geng Ho, Ali Akbar Pammu, Ne Kyaw Zwa Lwin, Kwen-Siong Chong, Bah-Hwee Gwee:
High Throughput and Secure Authentication-Encryption on Asynchronous Multicore Processor for Edge Computing IoT Applications. 173-174 - Taegeun Yoo, Tony Tae-Hyoung Kim, Bongjin Kim, Chengshuo Yu, Kevin Chai Tshun Chuan:
Design of Current-Mode 8T SRAM Compute-In-Memory Macro for Processing Neural Networks. 175-176 - Hiroo Sekiya, Jingyue Ma, Kien Nguyen, Xiuqin Wei:
Design of Class-Φ3 Inverter. 179-180 - Yoko Uwate, Yoshifumi Nishio
Frustrated Complex Networks of Nonlinear Circuits With Stochastically Coupling. 181-182 - Kodai Kitamura, Yoko Uwate, Yoshifumi Nishio
Maintaining Images by Cellular Neural Networks with Switching Two Templates. 183-184 - Naoto Yonemoto, Katsuya Nakabai, Yoko Uwate, Yoshifumi Nishio
Investigation of Synchronization Phenomena in Coupled Two-degrees-of-Freedom Chaotic Circuits. 185-186 - Tsuyoshi Isozaki, Takumi Nara, Yoko Uwate, Yoshifumi Nishio
Analysis of Synchronization Phenomena in Complex Networks Consisting of van der Pol Oscillators. 187-188 - Yu-Hsiang Chen, Chih-Peng Fan
Prototype of Low Complexity CNN Hardware Accelerator with FPGA-based PYNQ Platform for Dual-Mode Biometrics Recognition. 189-190 - Tai-Wei Chen, Wei-Liang Lin:
3D Human Motion Reconstruction in Unity With Monocular Camera. 191-192 - Chung-Bin Wu
High Efficient Bandwidth Utilization Hardware Design and Implement for AI Deep Learning Accelerator. 193-194 - Chuen-Yau Chen, Cheng-Yuan Lin, Yi-Ze Zou, Hung-Ming Hsiao, Yen-Ting Chen:
Application of Blind Signal Processing in Image Watermarking Systems. 195-196 - Kuan-Hung Chen, Yu-Ta Lu:
A Distance-Aware Technique for Object Detection Used in Self-Driving Vehicles. 197-198 - Cheng-Hsien Chen, Yeong-Kang Lai:
The Influence Measures of Light Intensity on Machine Learning for Semantic Segmentation. 199-200 - Jiyong Woo, Miyoung Lee, Jeong Hun Kim, Jong-Pil Im, Solyee Im, Yeriaron Kim, Seung-Eon Moon, Joohyun Lee:
Impact of Variability Issues of Resistive Memory Synapses on Pattern Recognition Systems. 201-202 - Yoko Uwate, Yoshifumi Nishio
Nonlinear Time Series Analysis of Spike Data of Izhikevich Neuron Model. 203-204 - Liang Chang, Siqi Yang, Jiahao Liu, Jianbiao Xiao
Scalability Analysis and Modeling of XPoint-based MRAM. 205-206 - Jerald Yoo:
Area and Energy-Efficient Multi-Channel Instrumentation Amplifiers for Biomedical Applications. 207-208 - Jongmin Park, Youngjoo Lee
Low-Complexity DNN-Based End-to-End Automatic Speech Recognition using Low-Rank Approximation. 210-211 - Phap Duong-Ngoc
Efficient $k$-Parallel Pipelined NTT Architecture for Post Quantum Cryptography. 212-213 - WonJong Kim
Fast Prototyping of a Deep Neural Network on an FPGA. 214-215 - Thang Xuan Pham
Efficient Check Node Unit Architecture for Non-binary Quasi-Cyclic LDPC Codes. 216-217 - Yoon Seok Yang, Yongtae Kim:
Recent Trend of Neuromorphic Computing Hardware: Intel's Neuromorphic System Perspective. 218-219 - Arash Hejazi
A Sub-1-mW Fractional-N Phase-Locked Loop For Mixer-Based Wake-up Receiver In Wireless Sensors. 220-221 - Hao-Hsiang Hsu, Ching-Yuan Yang, Dung-An Wang
A High-Efficiency Parallel-SSHI Rectifier for Piezoelectric Energy Harvesting. 222-223 - Donggeun You, Hyunwoo Heo, Hyungseup Kim, Yongsu Kwon, Hyoungho Ko, Sangmin Lee:
A Current Feedback Instrumentation Amplifier with Current Reuse and Power Line Interference Mitigation Technique for ECG Recording. 224-225 - Hyunwoo Heo, Hyungseup Kim, Donggeun You, Yongsu Kwon, Hyoungho Ko, Yil-Suk Yang:
Phase-Locked Loop-Based Nanoresonator Integrated Circuit for Motional Resistance Sensing with Automatic Gain Control. 226-227 - Yongsu Kwon, Hyungseup Kim, Donggeun You, Hyunwoo Heo, Hyoungho Ko, Sangmin Lee:
A 28.4 nV/√Hz Chopper Stabilized Current Feedback Instrumentation Amplifier with Auto Offset Calibration DAC for Resistive Bridge Sensor. 228-229 - Taeyeon Kim, Sunguk Choi, S. Han, Jongsun Kim:
An All-Digital MDLL for Programmable N/M-ratio Frequency Multiplication. 230-231 - Taeung No, Jaeduk Han:
Design Techniques for Robust and Area-efficient Current Sources in Nanometer CMOS Technology. 232-233 - Yoon Woo Kim, Min Gu Kim, Yellappa Palagani, Jun Rim Choi:
13.56 MHz High-Efficiency Power Transmitter and Receiver for Wirelessly Powered Biomedical Implants. 234-235 - Hyeokjoon Yang, Hyunbae Lee, Hanseul Kim, Sangwook Park, Jinwook Burm:
A 12-b 2 MS/s R-C Two-Step SAR ADC with Bit-Cycling Time Control and LSB Correction Logic. 238-239 - Lei Sha, Anna Kuwana, Masashi Horiguchi, Haruo Kobayashi:
Simple Reference Voltage Generation Circuit Insensitive to Temperature. 242-243 - Alaaddin Al-Shidaifat
Chaotic True Random Number Generator for Secure Communication Applications. 244-245 - Hyungmin Kim, Daniel Juhun Lee, Soyoun Park, Taemin Nho, YoungChul Shin, Seongkweon Kim, Dongha Shim:
Current Mode Neuromorphic Implementation using Current Memory. 248-249 - So-Hyeon Park, Jae-Hee Lee, Hang-Geun Jeong, Donggu Im:
Design of a CMOS Current-mode Squaring Circuit for Training Analog Neural Networks. 250-251 - Yang Azevedo Tavares, Sewon Lee
Calibration of M-Channel Time-Interleaved Analog-to-Digital Converters Based on Curve Fitting. 252-253 - Youngchang Choi, Sunmean Kim
Low-Power 4-Trit Current-Steering DAC for Ternary Data Conversion. 254-255 - Soyoun Park, Hyungmin Kim, Daniel Juhun Lee, Taemin Nho, Seongkweon Kim, Dongha Shim:
Reduced power consumption Current-mode ADC using SAR logic for AI application. 256-257 - Soon Ho Choi, Kang-Yoon Lee:
A Design of 5.8 GHz Ultralow-Power Wake-up Receiver: 14 kHz On Off Keying for DSRC Application. 260-261 - Min Yeong Kim, Kang-Yoon Lee:
A Design of Charge Pump for Low Noise Phase-Locked Loops using Clock Quadrature. 262-263 - Kyongsu Lee, Jae-Yoon Sim:
High-speed transceiver network for in-vehicle communication system. 264-265 - Jung-Woo Sull, Hyungrok Do, Deog-Kyoon Jeong:
A 112-Gb/s PAM-4 Transmitter with 8: 1 MUX in 28-nm CMOS. 266-267 - Min-Joon Kim, Sung-Hun Chae, Yeon-Kug Moon:
Implementation of Real-time Simulation System for Li-ion Battery Protection Circuit Module. 268-269 - Hyunju Kim, Youngmin Kim:
Binary Content-Addressable Memory System using Nanoelectromechanical Memory Switch. 270-271 - Yeon-Jin Kim, Jin-Gyun Chung:
Variable Length MAC for CAN Security Protocol. 272-273 - Manhee Cho, Youngmin Kim:
Nanoelectromechanical Memory Switch based Ternary Content-Addressable Memory. 274-275 - Quan-Dung Pham, Xuan Truong Nguyen, Hyuk-Jae Lee, Hyun Kim:
An MAE-aware ROI Sampling Model for LiDAR. 276-277 - Manikanta Prahlad Manda, Chan Su Park, ByeongCheol Oh, Daijoon Hyun, Hi-Seok Kim:
Pedestrian Detection in Infrared Thermal Images Based on Raised Cosine Distribution. 278-279 - Waseem Abbas, Munkyo Seo:
Fully Randomized 4-Channel 30 Gb/s Differential PRBS Generator with Single Clock Input and Different Channel Seed Settings: 4 x 30Gb/s Differential PRBSG with Different seed settings using single clock. 280-281 - Prashanthi Metku, Minsu Choi, Kyung Ki Kim, Yong-Bin Kim:
Gate Diffusion Input Multi-Threshold Null Convention Logic Circuit Design Approach. 282-283 - Seungho Lee, Youngmin Kim:
Implementation of Modular Subtraction Unit for NTT-based Polynomial Multiplier. 284-285 - Cheol-Won Jo, Kwang-Yeob Lee:
Bit-Serial multiplier based Neural Processing Element with Approximate adder tree. 286-287 - Min-Joon Kim, Sung-Hun Chae, Yeon-Kug Moon:
Adaptive Battery State-of-Charge Estimation Method for Electric Vehicle Battery Management System. 288-289 - Dohyun Kim, Taeyang Jeong, Eui-Young Chung:
Resource Utilization Optimized Design Method for Matched Filter of PSS Searcher. 290-291 - Jinho Jeong, Jongsun Park:
Fast 6T SRAM Bit-Line Computing with Consecutive Short Pulse Word-Lines and Skewed Inverter. 292-293 - Sungsoo Cheon, Jongsun Park:
A Bit-Line Boosting Technique for Fast Bit-Line Computation without Read Disturbance. 294-295 - Gi Lee, Byoung Jin Kim, Eui-Young Chung:
Exploring Replacement Policy for Memcached. 296-297 - Jaeik Cho, Youngmin Kim:
Low Power Approximate Multiplier Using Error Tolerant Adder. 298-299 - Imran Ali, Muhammad Asif, Huo Yingge, Muhammad Riaz ur Rehman, Kang-Yoon Lee:
An Ultra-Low Power Wake-up Receiver Digital Controller for 5.8 GHz DSRC Applications. 300-301 - Eunchong Lee
Implementation of a Round Robin Processing Element for Deep Learning Accelerator. 302-303 - Junghoon Cho, Junhyun Song, Jongsun Park:
Implementation of Low Cost ARIA Architecture with Composite Field Optimization and Datapath Modification. 304-305 - Hyun Woo Oh
Design of 32-bit Processor for Embedded Systems. 306-307 - Do-Yeon Hwang, Yeon-Jin Kim, Jin-Gyun Chung:
CAN Security Protocol Using Modified MAC. 308-309 - Jeonggyu Yang, Taigon Song:
A Prediction Scheme in Spiking Neural Network (SNN) Hardware for Ultra-low Power Consumption. 310-311 - Ye In Park, Jou Won Song, Suk-Ju Kang:
HDR Image Generator Focused on Saturated Region Restoration with Contextual Loss. 312-313 - Sungrae Kim, Hyun Kim:
Mixture of Deterministic and Stochastic Quantization Schemes for Lightweight CNN. 314-315 - Nam Joon Kim, Hyun Kim:
Mask-Soft Filter Pruning for Lightweight CNN Inference. 316-317 - Zelin Meng, Zhiyu Zhang, Lin Meng, Hiroyuki Tomiyama:
A Case Study on Rubbing Character Recognition Based on Deep Learning. 318-319 - Seung Il Lee, Hyun Kim:
Instant and Accurate Instance Segmentation Equipped with Path Aggregation and Attention Gate. 320-321 - Changmin Ye, Vladimir Kornijcuk, Jeeson Kim, Doo Seok Jeong:
FPGA implementation of sequence-to-sequence predicting spiking neural networks. 322-323 - Seong Bin Choi, Sang-Seol Lee, Jonghee Park, Sung-Joon Jang, Byung-Ho Choi:
Efficient final output feature map processing method supporting real-time object detection and recognition. 324-325 - Jiun Hong, TaeGeon Lee, Saad Arslan, HyungWon Kim:
Compact CNN Training Accelerator with Variable Floating-Point Datapath. 326-327 - Amrita Rana, Kyung Ki Kim:
A Lightweight DNN for ECG Image Classification. 328-329 - Takava Watanabe, Hiroki Nishikawa, Hiroyuki Tomiyama:
Scheduling of Rigid Tasks on Heterogeneous Multicores. 330-331 - Minji Lee, Changseok Choi, Donghyeon Seo, Byeongjun Bang, Yongseok Kang, Woohyun Paik:
Improving Analysis Coverage for Dynamic IR Drop Sign-off in FinFET SoC Design. 332-333 - Mayu Ida, Hiroki Nishikawa, Xiangbo Kong, Ittetsu Taniguchi, Hiroyuki Tomiyama:
A Quadcopters Flight Simulation Considering the Influence of Wind. 334-335 - Woo-Young Choi:
Effective Software Scheme of the Space Vector Modulation Using One-Chip Micro-Controller. 336-337 - Ashutosh Mishra
An Efficient Sensory System for Intelligent Gas Monitoring Accurate classification and precise quantification of gases/ odors. 338-339 - Jaekwang Cha, Jinhyuk Kim, Shiho Kim:
Skin Deformation Deteciton Sensory System for AR Headset Hands-free Interface. 342-343
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