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21st DSD 2018: Prague, Czech Republic
- Martin Novotný, Nikos Konofaos, Amund Skavhaug:
21st Euromicro Conference on Digital System Design, DSD 2018, Prague, Czech Republic, August 29-31, 2018. IEEE Computer Society 2018, ISBN 978-1-5386-7377-5
Main
Memory
- Michal Kekely, Lukas Kekely
, Jan Korenek:
Memory Aware Packet Matching Architecture for High-Speed Networks. 1-8 - Nikolaos Toulgaridis, Eleni Bougioukou, Theodore Antonakopoulos:
Real-Time Emulation of Multiple NAND Flash Channels by Exploiting the DRAM Memory of High-end Servers. 9-15 - Inayat Ullah, Umar Afzaal, Zahid Ullah, Jeong-A Lee:
High-Speed Configuration Strategy for Configurable Logic Block-Based TCAM Architecture on FPGA. 16-21
Architecture/Arithmetics/Computing
- Shen-Fu Hsiao, Yu-Chang Chen, Hsiang-Hao Liang:
Architectural Exploration of Function Computation Based on Cubic Polynomial Interpolation with Application in Deep Neural Networks. 22-29 - Adrian Horga, Sudipta Chattopadhyay, Petru Eles, Zebo Peng:
Measurement Based Execution Time Analysis of GPGPU Programs via SE+GA. 30-37 - Antonio Saavedra
Heavy-Hitter Detection Using a Hardware Sketch with the Countmin-CU Algorithm. 38-45 - Lukás Kohútka
A Novel Hardware-Accelerated Priority Queue for Real-Time Systems. 46-53 - Luc Waeijen, Hailong Jiao, Henk Corporaal, Yifan He:
Datawidth-Aware Energy-Efficient Multipliers: A Case for Going Sign Magnitude. 54-61
Chip Design
- Kasra Moazzemi, Anil Kanduri, David Juhasz
Trends in On-chip Dynamic Resource Management. 62-69 - Francisco-Javier Veredas, Enrique J. Carmona:
FPGA Placement Improvement Using a Genetic Algorithm and the Routing Algorithm as a Cost Function. 70-76 - Reinier van Kampenhout, Sander Stuijk
Fault-Tolerant Deployment of Dataflow Applications Using Virtual Processors. 77-84 - Gaku Kataoka, Masato Inagi, Shinobu Nagayama, Shin'ichi Wakabayashi:
Novel Feature Vectors Considering Distances between Wires for Lithography Hotspot Detection. 85-90
Image Processing/Coding
- Javier Cardenas, Miguel E. Figueroa
Multimodal Image Registration between SWIR and LWIR Images in an Embedded System. 91-98 - Hasan Azgin, Ahmet Can Mert
A Reconfigurable Fractional Interpolation Hardware for VVC Motion Compensation. 99-103 - Oana Boncalo, Alexandru Amaricai, Sergiu Nimara:
Memory-Centric Flooded LDPC Decoder Architecture Using Non-surjective Finite Alphabet Iterative Decoding. 104-109 - Gabriele Perrone, Javier Valls, Vicente Torres, Francisco Miguel Garcia-Herrero:
High-Throughput One-Channel RS(255, 239) Decoder. 110-114
Simulation/Modeling/Education
- Andreas Brokalakis, Nikolaos Tampouratzis
COSSIM: An Open-Source Integrated Solution to Address the Simulator Gap for Systems of Systems. 115-120 - Hadi Alizadeh Ara, Marc Geilen
Compositional Dataflow Modelling for Cyclo-Static Applications. 121-129 - Ruben Jonk, Jeroen Voeten, Marc Geilen
Timing Prediction for Service-Based Applications Mapped on Linux-Based Multi-core Platforms. 130-139 - Esko Pekkarinen, Timo D. Hämäläinen:
Modeling RISC-V Processor in IP-XACT. 140-147 - Jan Belohoubek
KETCube - The Universal Prototyping IoT Platform. 148-154
Main Posters
- Nizam Ayyildiz:
Flexible and Resource Efficient FPGA-Based Quad Data Rate Memory Interface Design for High-Speed Data Acquisition Systems. 155-158 - Lukas Gressl, Ulrich Neffe, Christian Steger:
Design and Implementation of an HCI Based Peer to Peer APDU Protocol. 159-162 - Mikko Teuho
Visualization of Memory Map Information in Embedded System Design. 163-166 - Anastasios Petropoulos, Theodore Antonakopoulos:
A Versatile PCM-Based Circuits Emulator and Its Use on Implementing Linear Algebra Functions. 167-171 - Daniele Cattaneo
Embedded Operating System Optimization through Floating to Fixed Point Compiler Transformation. 172-176 - Yasamin Mahmoodi, Sebastian Reiter, Alexander Viehl, Oliver Bringmann, Wolfgang Rosenstiel:
Attack Surface Modeling and Assessment for Penetration Testing of IoT System Designs. 177-181
DTFT: Dependability, Testing and Fault Tolerance in Digital Systems
- Saaed S. Faraji, Javad Talafy, Amir M. Hajisadeghi
DUSTER: DUal Source Write TERmination Method for STT-RAM Memories. 182-189 - Tooba Arifeen, Abdus Sami Hassan, Jeong-A Lee:
Error Correctable Approximate Multiplier with Area/Power Efficient Design Through Mixed CMOS/PTL. 190-195 - Umar Afzaal, Abdus Sami Hassan, Tooba Arifeen, Jeong-A Lee:
Effect of FPGA Circuit Implementation on Error Detection Using Logic Implication Checking. 196-200 - Oliver Schrape, Anselm Breitenreiter
D-SET Mitigation Using Common Clock Tree Insertion Techniques for Triple-Clock TMR Flip-Flop. 201-205 - Farnoosh Hosseinzadeh, Petr Pfeifer, Heinrich Theodor Vierhaus:
Optimal Dependability and Fine Granular Error Resilience Methodology for Reconfigurable Systems. 206-213 - Ondrej Cekan
Program Generation Through a Probabilistic Constrained Grammar. 214-220 - Mahsa Mousavi, Hamid Reza Pourshaghaghi, Mohammad Tahghighi, Roel Jordans, Henk Corporaal:
A Generic Methodology to Compute Design Sensitivity to SEU in SRAM-Based FPGA. 221-228 - Jakub Podivinsky, Jakub Lojda, Ondrej Cekan
Evaluation Platform for Testing Fault Tolerance Properties: Soft-core Processor-Based Experimental Robot Controller. 229-236 - Amir M. Hajisadeghi
MOMENT: A Cross-Layer Method to Mitigate Multiple Event Transients in Combinational Circuits. 237-243 - Jakub Lojda, Jakub Podivinsky, Ondrej Cekan
FT-EST Framework: Reliability Estimation for the Purposes of Fault-Tolerant System Design Automation. 244-251
ASAASIT: Architectures and Systems for Automotive, Aeronautic, Space and Intelligent Transportation
- Tomaso Poggi
A Hypervisor Architecture for Low-Power Real-Time Embedded Systems. 252-259 - Pablo Ribalta Lorenzo, Michal Marcinkiewicz, Jakub Nalepa:
Segmentation of Hyperspectral Images Using Quantized Convolutional Neural Networks. 260-267 - Josef Steinbaeck, Christian Steger
Design of a Low-Level Radar and Time-of-Flight Sensor Fusion Framework. 268-275
ASAASIT Poster
- Shen-Fu Hsiao, Chen-Yen Tsai:
Design and Implementation of Low-Cost LK Optical Flow Computation for Images of Single and Multiple Levels. 276-279
DCPS: Design of Cyber-Physical Systems
- Muhammad Shafique
Intelligent Security Measures for Smart Cyber Physical Systems. 280-287 - Sayandip De, Jos Huisken
Designing Energy Efficient Approximate Multipliers for Neural Acceleration. 288-295 - Seyyed Ahmad Razavi, Eli Bozorgzadeh, Kanghee Kim, Solmaz S. Kia
Resource-Aware Decentralization of a UKF-Based Cooperative Localization for Networked Mobile Robots. 296-303 - Pouya Mahdavipour Vahdati:
Design Optimization of Cyber-Physical Systems by Partitioning and Coordination: A Study on Mechatronic Systems. 304-311 - Viktorio Semir el Hakim, Marco Jan Gerrit Bekooij:
Stability Verification of Self-Timed Control Systems Using Model-Checking. 312-319 - Sajid Mohamed
Optimising Quality-of-Control for Data-Intensive Multiprocessor Image-Based Control Systems Considering Workload Variations. 320-327 - Davit Hovhannisyan, Ahmed M. Eltawil
Circuit Inspired Modeling Method for Irrigation. 328-335
DCPS Posters
- Roel van der Tempel, Joost van Pinxten, Marc Geilen
A Heuristic for Variable Re-Entrant Scheduling Problems. 336-341 - Thomas Nägele
Building Distributed Co-Simulations Using CoHLA. 342-346 - Jan Sramota, Amund Skavhaug:
RailCheck: A WSN-Based System for Condition Monitoring of Railway Infrastructure. 347-351 - Amr Ibrahim, Chetan Belagal Math, Dip Goswami, Twan Basten, Hong Li:
Co-simulation Framework for Control, Communication and Traffic for Vehicle Platoons. 352-356
AMDL: Applications, Architectures, Methods and Tools for Machine - and Deep Learning
- Barry de Bruin
Quantization of Constrained Processor Data Paths Applied to Convolutional Neural Networks. 357-364 - Rastislav J. R. Struharik, Bogdan Vukobratovic, Andrea Erdeljan, Damjan Rakanovic:
CoNNA - Compressed CNN Hardware Accelerator. 365-372 - Sima Sinaei, Omid Fatemi:
Run-time Mapping Algorithm for Dynamic Workloads on Heterogeneous MPSoCs Platforms. 373-380 - Sajna Remi Clere, Sachin Sethumadhavan, Kuruvilla Varghese:
FPGA Based Reconfigurable Coprocessor for Deep Convolutional Neural Network Training. 381-388 - Simon Meckel, Roman Obermaisser, Jie-Uei Yang:
Generation of a Diagnosis Model for Hybrid-Electric Vehicles Using Machine Learning. 389-396 - Mohammad Loni, Masoud Daneshtalab, Mikael Sjödin:
ADONN: Adaptive Design of Optimized Deep Neural Networks for Embedded Systems. 397-404 - Emanuele Torti
Embedded Real-Time Fall Detection with Deep Learning on Wearable Devices. 405-412 - Elena Zennaro, Lorenzo Servadei, Keerthikumara Devarajegowda, Wolfgang Ecker:
A Machine Learning Approach for Area Prediction of Hardware Designs from Abstract Specifications. 413-420
AMDL Poster
- Janne Takalo-Mattila, Jussi Kiljander, Juha-Pekka Soininen:
Inter-Patient ECG Classification Using Deep Convolutional Neural Networks. 421-425
ASHWPA: Advanced Systems in Healthcare, Wellness and Personal Assistance
- Farnaz Forooghifar, Amir Aminifar, David Atienza Alonso:
Self-Aware Wearable Systems in Epileptic Seizure Detection. 426-432 - Caterina Nahler, Bernhard Feldhofer, Matthias Rüther, Gerald Holweg, Norbert Druml:
Exploring the Usage of Time-of-Flight Cameras for Contact and Remote Photoplethysmography. 433-441 - Foteini Andriopoulou, Anastasios Fanariotis, Theofanis Orphanoudakis:
SEEK: SIP-Based Emergency Embedded Framework Supports Elderly and Disabled to Perform Emergency Calls. 442-449 - Norbert Druml, Thomas Pietsch, Markus Dielacher
Virtual White Cane Featuring Time-of-Flight 3D Imaging Supporting Visually Impaired Users. 450-457 - Mohammed Al Disi, Hamza Djelouat, Abbes Amira, Faycal Bensaali
The Accuracy and Efficacy of Real-Time Compressed ECG Signal Reconstruction on a Heterogeneous Multicore Edge-Device. 458-463 - Christos Zachariadis
MATISSE: A Smart Hospital Ecosystem. 464-471 - Dakila Serasinghe, Duvindu Piyasena, Ajith Pasqual:
A Novel Low-Complexity VLSI Architecture for an EEG Feature Extraction Platform. 472-478
ASHWPA Posters
- Alejandro Von Chong
Towards Spectral Pulse Oximetry Independent of Motion Artifacts. 479-483 - Edwin De Roux, Mehdi Terosiet, Florian Kölbl
Toward an OFDM-Based Technique for Electrochemical Impedance Spectroscopy. 484-487 - Helder H. Avelar, João Canas Ferreira
Design and Evaluation of a Low Power CGRA Accelerator for Biomedical Signal Processing. 488-491
AHSA: Architectures and Hardware for Security Applications
- Victor Arribas, Svetla Nikova
Guards in Action: First-Order SCA Secure Implementations of Ketje Without Additional Randomness. 492-499 - Sébastien Carré, Matthieu Desjardins, Adrien Facon, Sylvain Guilley:
OpenSSL Bellcore's Protection Helps Fault Attack. 500-507 - Jean-Luc Danger, Risa Yashiro, Tarik Graba, Yves Mathieu, Abdelmalek Si-Merabet, Kazuo Sakiyama, Noriyuki Miura, Makoto Nagata
Analysis of Mixed PUF-TRNG Circuit Based on SR-Latches in FD-SOI Technology. 508-515 - Apostolos P. Fournaris, Lampros Pyrgas, Paris Kitsos
An FPGA Hardware Trojan Detection Approach Based on Multiple Parameter Analysis. 516-522 - Stanislav Jerabek
Dummy Rounds as a DPA Countermeasure in Hardware. 523-528 - Jean-Luc Danger, Adrien Facon, Sylvain Guilley, Karine Heydemann, Ulrich Kühne, Abdelmalek Si-Merabet, Michaël Timbert:
CCFI-Cache: A Transparent and Flexible Hardware Protection for Code and Control-Flow Integrity. 529-536 - Krishnendu Guha
Reliability Driven Mixed Critical Tasks Processing on FPGAs Against Hardware Trojan Attacks. 537-544 - Niels Pirotte, Jo Vliegen, Lejla Batina, Nele Mentens
Design of a Fully Balanced ASIC Coprocessor Implementing Complete Addition Formulas on Weierstrass Elliptic Curves. 545-552 - Alexander Schaub
An Improved Analysis of Reliability and Entropy for Delay PUFs. 553-560
AHSA Posters
- Johan Laurent, Vincent Beroulle, Christophe Deleuze, Florian Pebay-Peyroula, Athanasios Papadimitriou
On the Importance of Analysing Microarchitecture for Accurate Software Fault Models. 561-564 - Petr Socha
Correlation Power Analysis Distinguisher Based on the Correlation Trace Derivative. 565-568 - Markku Vajaranta, Vili Viitamäki, Arto Oinonen
Feasibility of FPGA Accelerated IPsec on Cloud. 569-572 - Maxime Cozzi, Jean-Marc Gallière, Philippe Maurine:
Exploiting Phase Information in Thermal Scans for Stealthy Trojan Detection. 573-576 - Thomas Hiscock, Olivier Savry, Louis Goubin:
On the Design of a Processor Working Over Encrypted Data. 577-580 - Nikolaos Athanasios Anagnostopoulos
Low-Temperature Data Remanence Attacks Against Intrinsic SRAM PUFs. 581-585
EPDSD: European Projects in Digital System Design
- Paris Panagiotou, Nicolas Sklavos
Design and Implementation of a Privacy Framework for the Internet of Things (IoT). 586-591 - Luigi Pomante
The AQUAS ECSEL Project. 592-599 - Cristina Silvano, Giovanni Agosta, Andrea Bartolini
ANTAREX: A DSL-Based Approach to Adaptively Optimizing and Enforcing Extra-Functional Properties in High Performance Computing. 600-607 - Gagandeep Singh, Lorenzo Chelini, Stefano Corda
A Review of Near-Memory Computing Architectures: Opportunities and Challenges. 608-617 - Norbert Druml, Georg Macher, Michael Stolz
PRYSTINE - PRogrammable sYSTems for INtelligence in AutomobilEs. 618-626 - Robin Arbaud
Resource Management for Mixed-Criticality Systems on Multi-core Platforms with Focus on Communication. 627-641
FTET: Future Trends in Emerging Technologies
- Frank Sill Torres
Exploration of the Synchronization Constraint in Quantum-dot Cellular Automata. 642-648 - Frank Sill Torres
Evaluating the Impact of Interconnections in Quantum-Dot Cellular Automata. 649-656 - Jan Nevoral
From Ambipolarity to Multifunctionality: Novel Library of Polymorphic Gates Using Double-Gate FETs. 657-664 - Saman Fröhlich, Daniel Große
Towards Reversed Approximate Hardware Design. 665-671 - Sumit Sharma
On Designing All-Optical Multipliers Using Mach-Zender Interferometers. 672-679
FTET Poster
- Gerhard W. Dueck, Anirban Pathak
Optimization of Circuits for IBM's Five-Qubit Quantum Computers. 680-684
SDCIS: System Design for Collaborating Intelligent Systems
- Carlo Lopez-Tello, V. Muthukumar:
Classifying Acoustic Signals for Wildlife Monitoring and Poacher Detection on UAVs. 685-690 - Roghaiyeh Heidari, Mohsen Afsharchi, Reza Khanmohammadi:
A Markovian Decision Process Analysis of Experienced Agents Joining Ad-Hoc Teams. 691-698 - Tomas Mikula, Rune Hylsberg Jacobsen:
Identity and Access Management with Blockchain in Electronic Healthcare Records. 699-706
SDCIS Poster
- Arne Devos, Emad Ebeid
Development of Autonomous Drones for Adaptive Obstacle Avoidance in Real World Environments. 707-710
MCSDIA: Mixed-Criticality System Design, Implementation and Analysis
- Razi Seyyedi, Sören Schreiner, Maher Fakih, Kim Grüttner, Wolfgang Nebel:
Functional Test Environment for Time-Triggered Control Systems in Complex MPSoCs Using GALI. 711-718 - Kathrin Rosvall, Tage Mohammadat, George Ungureanu, Johnny Öberg, Ingo Sander
Exploring Power and Throughput for Dataflow Applications on Predictable NoC Multiprocessors. 719-726 - Xavier Civit, Joan del Castillo, Jaume Abella
A Reliable Statistical Analysis of the Best-Fit Distribution for High Execution Times. 727-734
MCSDIA Posters
- Hongjie Fang, Roman Obermaisser:
Virtual Switch Supporting Time-Space Partitioning and Dynamic Configuration for Integrated Train Control and Management Systems. 735-739 - Vittoriano Muttillo, Giacomo Valente, Luigi Pomante
Design Space Exploration for Mixed-Criticality Embedded Systems Considering Hypervisor-Based SW Partitions. 740-744
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