• case-insensitive prefix search: default
  e.g., sig matches "SIGIR" as well as "signal"
• exact word search: append dollar sign ($) to word
  e.g., graph$ matches "graph", but not "graphics"
• boolean and: separate words by space
  e.g., codd model
• boolean or: connect words by pipe symbol (|)
  e.g., graph|network

Update May 7, 2017: Please note that we had to disable the phrase search operator (.) and the boolean not operator (-) due to technical problems. For the time being, phrase search queries will yield regular prefix search result, and search terms preceded by a minus will be interpreted as regular (positive) search terms.

found 106 matches

• 2002
• 
  Emrah Acar, Sani R. Nassif, Ying Liu, Lawrence T. Pileggi:
  Time-Domain Simulation of Variational Interconnect Models. ISQED 2002: 419-424
• 
  Yazdan Aghaghiri, Farzan Fallah, Massoud Pedram:
  ALBORZ: Address Level Bus Power Optimization. ISQED 2002: 470-475
• 
  Robert C. Aitken:
  Test Generation and Fault Modeling for Stress Testing (invited). ISQED 2002: 95-99
• 
  Ersed Akcasu:
  A General and Comparative Study of RC(0), RC, RCL and RCLK Modeling of Interconnects and Their Impact on the Design of Multi-Giga Hertz Processors (Tutorial Abstract). ISQED 2002: 10
• 
  Syed M. Alam, Donald E. Troxel, Carl V. Thompson:
  A Comprehensive Layout Methodology and Layout-Specific Circuit Analyses for Three-Dimensional Integrated Circuits. ISQED 2002: 246-251
• 
  Shain Aur:
  Hot Carrier Reliability and Design Considerations (Tutorial Abstract). ISQED 2002: 9
• 
  Geng Bai, Ibrahim N. Hajj:
  Simultaneous Switching Noise and Resonance Analysis of On-Chip Power Distribution Network. ISQED 2002: 163-168
• 
  Kaustav Banerjee, Amit Mehrotra:
  Inductance Aware Interconnect Scaling. ISQED 2002: 43-47
• 
  Murat R. Becer, Rajendran Panda, David T. Blaauw, Ibrahim N. Hajj:
  Pre-route Noise Estimation in Deep Submicron Integrated Circuits. ISQED 2002: 413-418
• 
  Peter A. Beerel:
  Asynchronous Circuits: An Increasingly Practical Design Solution (invited). ISQED 2002: 367-372
• 
  Giora Ben-Yaacov, Pramod Suratkar, Marsha Holliday, Karen Bartleson:
  Advancing Quality of EDA Software (invited). ISQED 2002: 81-86
• 
  Wendemagegnehu T. Beyene, Chuck Yuan:
  On the Use of Windows for Accurate Analysis of Package Interconnects. ISQED 2002: 181-186
• 
  Terry Blanchard, Rick Ferreri, Jim Wilmore:
  The OpenAccess Coalition - The Drive to an Open Industry Standard Information Model, API, and Reference Implementation for IC Design Data (invited). ISQED 2002: 69-74
• 
  Pierre Bricaud:
  VC Rating and Quality Metrics: Why Bother? ISQED 2002: 257-260
• 
  Bob Brodersen:
  Wireless Systems-on-a-Chip Design. ISQED 2002: 221-222
• 
  Aiqun Cao, Naran Sirisantana, Cheng-Kok Koh, Kaushik Roy:
  Synthesis of Selectively Clocked Skewed Logic Circuits. ISQED 2002: 229-234
• 
  Sreejit Chakravarty:
  Supplemental Test Methods (Tutorial Abstract). ISQED 2002: 7
• 
  Norman Chang:
  Power/Ground Integrity Issues for Sub-130nm IC Designs (Tutorial Abstract). ISQED 2002: 10
• 
  Li-Fu Chang:
  RLCK Extraction and Simulation in High-Speed SoC Designs (Tutorial Abstract). ISQED 2002: 11
• 
  Henry Chang:
  Platform-Based Design: A Tutorial (Tutorial Abstract). ISQED 2002: 12
• 
  Nicholas Chia-Yuan Chang, Yao-Wen Chang, Iris Hui-Ru Jiang:
  Formulae for Performance Optimization and Their Applications to Interconnect-Driven Floorplanning. ISQED 2002: 523-528
• 
  Pallab K. Chatterjee, Richard Goering:
  Evening Panel Discussion: Are the Interoperability Standards for EDA Too Little/Too Late for Real SoC Designs? ISQED 2002: 15
• 
  Charlie Chung-Ping Chen, Ed Cheng:
  Future SoC Design Challenges and Solutions (invited). ISQED 2002: 534-538
• 
  Lauren Hui Chen, Malgorzata Marek-Sadowska:
  Efficient Closed-Form Crosstalk Delay Metrics. ISQED 2002: 431-436
• 
  John Chilton:
  IP REUSE QUALITY: "Intellectual Property" or "Intense Pain"? ISQED 2002: 21-22
• 
  Geun Rae Cho, Tom Chen:
  Mixed PTL/Static Logic Synthesis Using Genetic Algorithms for Low-Power Applications. ISQED 2002: 458-463
• 
  J. Joseph Clement:
  Electromigration Reliability Issues in High-Performance Circuit Design (Tutorial Abstract). ISQED 2002: 8
• 
  Fulvio Corno, Gianluca Cumani, Matteo Sonza Reorda, Giovanni Squillero:
  Automatic Test Program Generation from RT-Level Microprocessor Descriptions. ISQED 2002: 120-125
• 
  Olivier Coudert:
  Optimization in an Integrated Physical Design Flow (Tutorial Abstract). ISQED 2002: 13-14
• 
  Olivier Coudert:
  Timing and Design Closure in Physical Design Flows (invited). ISQED 2002: 511-516

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