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Publication search results
found 76 matches
- 2005
- Amit Agarwal, Kunhyuk Kang, Swarup Bhunia
, James D. Gallagher, Kaushik Roy:
Effectiveness of low power dual-Vt designs in nano-scale technologies under process parameter variations. ISLPED 2005: 14-19 - Emmanuel Allier, Julien Goulier, Gilles Sicard, Alessandro Dezzani
, Eric André, Marc Renaudin:
A 120nm low power asynchronous ADC. ISLPED 2005: 60-65 - Behnam Amelifard, Farzan Fallah, Massoud Pedram:
Low-power fanout optimization using multiple threshold voltage inverters. ISLPED 2005: 95-98 - Chinnakrishnan S. Ballapuram, Hsien-Hsin S. Lee, Milos Prvulovic:
Synonymous address compaction for energy reduction in data TLB. ISLPED 2005: 357-362 - William Lloyd Bircher, M. Valluri, J. Law, Lizy K. John:
Runtime identification of microprocessor energy saving opportunities. ISLPED 2005: 275-280 - Dennis Buss:
Technology and design challenges for mobile communication and computing products. ISLPED 2005: 1 - Kuei-Chung Chang, Jih-Sheng Shen, Tien-Fu Chen:
A low-power crossroad switch architecture and its core placement for network-on-chip. ISLPED 2005: 375-380 - Yu Ching Chang, King Ho Tam, Lei He:
Power-optimal repeater insertion considering Vdd and Vth as design freedoms. ISLPED 2005: 137-142 - Daniel Chaver, Miguel A. Rojas, Luis Piñuel, Manuel Prieto, Francisco Tirado, Michael C. Huang
:
Energy-aware fetch mechanism: trace cache and BTB customization. ISLPED 2005: 42-47 - Kuan-Hung Chen, Kuo-Chuan Chao, Jinn-Shyan Wang, Yuan-Sun Chu, Jiun-In Guo:
An efficient spurious power suppression technique (SPST) and its applications on MPEG-4 AVC/H.264 transform coding design. ISLPED 2005: 155-160 - Xinhua Chen, Qiuting Huang:
A 9.5mW 4GHz WCDMA frequency synthesizer in 0.13µm CMOS. ISLPED 2005: 66-71 - Guangyu Chen, Mahmut T. Kandemir:
Dataflow analysis for energy-efficient scratch-pad memory management. ISLPED 2005: 327-330 - Yiran Chen, Hai Li, Kaushik Roy, Cheng-Kok Koh:
Cascaded carry-select adder (C2SA): a new structure for low-power CSA design. ISLPED 2005: 115-118 - Xueqi Cheng, Michael S. Hsiao:
Region-level approximate computation reuse for power reduction in multimedia applications. ISLPED 2005: 119-122 - David G. Chinnery
, Kurt Keutzer:
Linear programming for sizing, Vth and Vdd assignment. ISLPED 2005: 149-154 - Jason Cong, Ashok Jagannathan, Glenn Reinman, Yuval Tamir:
Understanding the energy efficiency of SMT and CMP with multiclustering. ISLPED 2005: 48-53 - Gilberto Contreras, Margaret Martonosi:
Power prediction for intel XScale processors using performance monitoring unit events. ISLPED 2005: 221-226 - Azadeh Davoodi, Ankur Srivastava:
Probabilistic dual-Vth leakage optimization under variability. ISLPED 2005: 143-148 - William R. Dieter, Srabosti Datta, Wong Key Kai:
Power reduction by varying sampling rate. ISLPED 2005: 227-232 - Alireza Ejlali, Marcus T. Schmitz, Bashir M. Al-Hashimi, Seyed Ghassem Miremadi, Paul M. Rosinger:
Energy efficient SEU-tolerance in DVS-enabled real-time systems through information redundancy. ISLPED 2005: 281-286 - Dongrui Fan
, Zhimin Tang, Hailin Huang, Guang R. Gao:
An energy efficient TLB design methodology. ISLPED 2005: 351-356 - Ann Gordon-Ross, Frank Vahid, Nikil D. Dutt
:
Fast configurable-cache tuning with a unified second-level cache. ISLPED 2005: 323-326 - Jie Gu, Chris H. Kim:
Multi-story power delivery for supply noise reduction and low voltage operation. ISLPED 2005: 192-197 - Kanupriya Gulati, Nikhil Jayakumar, Sunil P. Khatri:
An algebraic decision diagram (ADD) based technique to find leakage histograms of combinational designs. ISLPED 2005: 111-114 - Zheng Guo, Sriram Balasubramanian, Radu Zlatanovici, Tsu-Jae King, Borivoje Nikolic
:
FinFET-based SRAM design. ISLPED 2005: 2-7 - Yao Guo, Mahmoud Ben Naser, Csaba Andras Moritz:
PARE: a power-aware hardware data prefetching engine. ISLPED 2005: 339-344 - Hassan Hassan, Mohab Anis, Mohamed I. Elmasry:
LAP: a logic activity packing methodology for leakage power-tolerant FPGAs. ISLPED 2005: 257-262 - Lei He, Mike Hutton, Tim Tuan, Steven J. E. Wilton:
Challenges and opportunities for low power FPGAs in nanometer technologies. ISLPED 2005: 90 - Seongmoo Heo, Krste Asanovic:
Replacing global wires with an on-chip network: a power analysis. ISLPED 2005: 369-374 - Jerry Hom, Ulrich Kremer:
Inter-program optimizations for conserving disk energy. ISLPED 2005: 335-338
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