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"A High-Speed Low-Power Multi-VDD CMOS/SIMOX SRAM With LV-TTL Level ..."

Nobutaro Shibata, Mayumi Watanabe, Hideomi Okiyama (2010)

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DOI: 10.1109/JSSC.2010.2051262

access: closed

type: Journal Article

metadata version: 2020-08-30

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Nobutaro Shibata, Mayumi Watanabe, Hideomi Okiyama:
A High-Speed Low-Power Multi-VDD CMOS/SIMOX SRAM With LV-TTL Level Input/Output Pins - Write/Read Assist Techniques for 1-V Operated Memory Cells. IEEE J. Solid State Circuits 45(9): 1856-1869 (2010)

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