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"A Low Power Digitally Error corrected 2.5 Bit per Stage Pipelined a/d ..."

Krzysztof Wawryn, Robert Suszynski, Bogdan Strzeszewski (2011)

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DOI: 10.1142/S0218126611007050

access: closed

type: Journal Article

metadata version: 2020-08-25

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  - journals/jcsc/WawrynSS11
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  - https://dblp.org/rec/journals/jcsc/WawrynSS11
Krzysztof Wawryn, Robert Suszynski, Bogdan Strzeszewski:
A Low Power Digitally Error corrected 2.5 Bit per Stage Pipelined a/d converter Using Current-Mode Signals. J. Circuits Syst. Comput. 20(1): 29-43 (2011)

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