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"Low-latency digit-serial dual basis multiplier for lightweight cryptosystems."

Che Wun Chiou et al. (2017)

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DOI: 10.1049/IET-IFS.2015.0336

access: closed

type: Journal Article

metadata version: 2020-08-27

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  - https://dblp.org/rec/journals/iet-ifs/ChiouLLYP17
Che Wun Chiou, Chiou-Yng Lee, Jim-Min Lin, Yun-Chi Yeh, Jeng-Shyang Pan:
Low-latency digit-serial dual basis multiplier for lightweight cryptosystems. IET Inf. Secur. 11(6): 301-311 (2017)

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