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"Early Routability Assessment in VLSI Floorplans: A Generalized Routing Model."

Bapi Kar, Susmita Sur-Kolay, Chittaranjan A. Mandal (2018)

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DOI: —

access: open

type: Informal or Other Publication

metadata version: 2018-11-08

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  - electronic edition @ arxiv.org (open access)
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  dblp key:
  - journals/corr/abs-1810-12789
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  persistent URL:
  - https://dblp.org/rec/journals/corr/abs-1810-12789
Bapi Kar, Susmita Sur-Kolay, Chittaranjan A. Mandal:
Early Routability Assessment in VLSI Floorplans: A Generalized Routing Model. CoRR abs/1810.12789 (2018)

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