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"Simultaneous Gate Sizing and Skew Scheduling to Statistical Yield Improvement."

Minoo Mirsaeedi, Morteza Saheb Zamani, Mehdi Saeedi (2008)

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DOI: 10.1109/ISVLSI.2008.69

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-24

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  dblp key:
  - conf/isvlsi/MirsaeediZS08
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  - https://dblp.org/rec/conf/isvlsi/MirsaeediZS08
Minoo Mirsaeedi, Morteza Saheb Zamani, Mehdi Saeedi:
Simultaneous Gate Sizing and Skew Scheduling to Statistical Yield Improvement. ISVLSI 2008: 467-470

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