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"SAT Encoding-Based Verification of Sneak Path Problem in Via-Switch FPGA."

Ryutaro Doi, Masanori Hashimoto (2018)

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DOI: 10.1109/ISVLSI.2018.00084

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-24

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  - https://dblp.org/rec/conf/isvlsi/DoiH18
Ryutaro Doi, Masanori Hashimoto:
SAT Encoding-Based Verification of Sneak Path Problem in Via-Switch FPGA. ISVLSI 2018: 429-434

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