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"34.6 A 28nm 72.12TFLOPS/W Hybrid-Domain Outer-Product Based Floating-Point ..."

Yiyang Yuan et al. (2024)

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DOI: 10.1109/ISSCC49657.2024.10454313

access: closed

type: Conference or Workshop Paper

metadata version: 2024-08-04

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  - conf/isscc/YuanYWLMCTWHZWRXMZ24
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  - https://dblp.org/rec/conf/isscc/YuanYWLMCTWHZWRXMZ24
Yiyang Yuan, Yiming Yang, Xinghua Wang, Xiaoran Li, Cailian Ma, Qirui Chen, Meini Tang, Xi Wei, Zhixian Hou, Jialiang Zhu, Hao Wu, Qirui Ren, Guozhong Xing, Pui-In Mak, Feng Zhang:
34.6 A 28nm 72.12TFLOPS/W Hybrid-Domain Outer-Product Based Floating-Point SRAM Computing-in-Memory Macro with Logarithm Bit-Width Residual ADC. ISSCC 2024: 576-578

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