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"Design of Data Buffer Circuit in High-speed, High-resolution Video Image ..."

Yao Lu, Zhao Yong, Li Xia (2007)

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DOI: —

access: unavailable

type: Conference or Workshop Paper

metadata version: 2008-01-24

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  dblp key:
  - conf/imecs/LuYX07
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  - https://dblp.org/rec/conf/imecs/LuYX07
Yao Lu, Zhao Yong, Li Xia:
Design of Data Buffer Circuit in High-speed, High-resolution Video Image Acquisition System on FPGA. IMECS 2007: 1771-1774

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