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"Development of an FPGA-based real-time P300 speller."

Kanav Khurana et al. (2012)

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DOI: 10.1109/FPL.2012.6339377

access: closed

type: Conference or Workshop Paper

metadata version: 2018-11-24

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  dblp key:
  - conf/fpl/KhuranaGPK12
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  - https://dblp.org/rec/conf/fpl/KhuranaGPK12
Kanav Khurana, Pooja Gupta, Rajesh Chandrasekhara Panicker, Akash Kumar:
Development of an FPGA-based real-time P300 speller. FPL 2012: 551-554

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