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"A heuristic algorithm for LUT-based FPGA technology mapping using the ..."

Taiga Takata, Yusuke Matsunaga (2010)

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DOI: 10.1145/1723112.1723179

access: closed

type: Conference or Workshop Paper

metadata version: 2018-11-06

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  - conf/fpga/TakataM10
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Taiga Takata, Yusuke Matsunaga:
A heuristic algorithm for LUT-based FPGA technology mapping using the lower bound for DAG covering problem (abstract only). FPGA 2010: 289

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