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"tSS-BO: Scalable Bayesian Optimization for Analog Circuit Sizing via ..."

Tianchen Gu et al. (2024)

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DOI: 10.23919/DATE58400.2024.10546770

access: closed

type: Conference or Workshop Paper

metadata version: 2024-10-06

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Tianchen Gu, Jiaqi Wang, Zhaori Bi, Changhao Yan, Fan Yang, Yajie Qin, Tao Cui, Xuan Zeng:
tSS-BO: Scalable Bayesian Optimization for Analog Circuit Sizing via Truncated Subspace Sampling. DATE 2024: 1-6

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