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"A fast, predictable FPGA with PLLs, dual port SRAMs and active repeaters."

Paul T. Sasaki et al. (1999)

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DOI: 10.1109/CICC.1999.777269

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-29

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  dblp key:
  - conf/cicc/SasakiBCCMMKTRZ99
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  persistent URL:
  - https://dblp.org/rec/conf/cicc/SasakiBCCMMKTRZ99
Paul T. Sasaki, Yogendra Bobra, Warren E. Cory, Atul V. Cihia, Suresh M, Menon, Madhavi Kola, Mammen Thomas, Prasad Rau, Arch Zaliznyak:
A fast, predictable FPGA with PLLs, dual port SRAMs and active repeaters. CICC 1999: 179-182

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