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"Post-placement Thermal Via Planning for 3D Integrated Circuit."

Jing Li, Hiroshi Miyashita (2006)

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DOI: 10.1109/APCCAS.2006.342144

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-17

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Jing Li, Hiroshi Miyashita:
Post-placement Thermal Via Planning for 3D Integrated Circuit. APCCAS 2006: 808-811

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