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"Circuit-level reliability simulator for front-end-of-line and ..."

Kexin Yang et al. (2018)

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DOI: 10.1109/VTS.2018.8368651

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-24

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  dblp key:
  - conf/vts/YangLZM18
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  persistent URL:
  - https://dblp.org/rec/conf/vts/YangLZM18
Kexin Yang, Taizhi Liu, Rui Zhang, Linda Milor:
Circuit-level reliability simulator for front-end-of-line and middle-of-line time-dependent dielectric breakdown in FinFET technology. VTS 2018: 1-6

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