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"Zero Cost Test Point Insertion Technique for Structured ASICs."

Rajamani Sethuram et al. (2007)

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DOI: 10.1109/VLSID.2007.181

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-24

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  - conf/vlsid/SethuramWCB07
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  - https://dblp.org/rec/conf/vlsid/SethuramWCB07
Rajamani Sethuram, Seongmoon Wang, Srimat T. Chakradhar, Michael L. Bushnell:
Zero Cost Test Point Insertion Technique for Structured ASICs. VLSI Design 2007: 357-363

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