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"Estimating Area Efficiency of Antifuse Based Channelled FPGA Architectures."

Mahesh Mehendale, Kaushik Roy (1993)

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DOI: 10.1109/ICVD.1993.669649

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-24

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  - https://dblp.org/rec/conf/vlsid/MehendaleR93
Mahesh Mehendale, Kaushik Roy:
Estimating Area Efficiency of Antifuse Based Channelled FPGA Architectures. VLSI Design 1993: 100-103

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