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"A Galois Field Based Logic Synthesis Approach with Testability."

Jimson Mathew et al. (2008)

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DOI: 10.1109/VLSI.2008.88

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-24

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  dblp key:
  - conf/vlsid/MathewRSJP08
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  persistent URL:
  - https://dblp.org/rec/conf/vlsid/MathewRSJP08
Jimson Mathew, Hafizur Rahaman, Ashutosh Kumar Singh, Abusaleh M. Jabir, Dhiraj K. Pradhan:
A Galois Field Based Logic Synthesis Approach with Testability. VLSI Design 2008: 629-634

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