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"MoCSYS: A Multi-Clock Hybrid Two-Layer Router Architecture and Integrated ..."

Arun Janarthanan, Karen A. Tomko (2008)

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DOI: 10.1109/VLSI.2008.79

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-24

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  - https://dblp.org/rec/conf/vlsid/JanarthananT08
Arun Janarthanan, Karen A. Tomko:
MoCSYS: A Multi-Clock Hybrid Two-Layer Router Architecture and Integrated Topology Synthesis Framework for System-Level Design of FPGA Based On-Chip Networks. VLSI Design 2008: 397-402

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