default search action

combined dblp search
author search
venue search
publication search

ask others

"1.22mW/Gb/s 9.6Gb/s data jitter mixing forwarded-clock receiver robust ..."

Sang-Hye Chung, Lee-Sup Kim (2012)

> Home

Details and statistics

DOI: 10.1109/VLSIC.2012.6243831

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-21

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - conf/vlsic/ChungK12
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/vlsic/ChungK12
Sang-Hye Chung, Lee-Sup Kim:
1.22mW/Gb/s 9.6Gb/s data jitter mixing forwarded-clock receiver robust against power noise with 1.92ns latency mismatch between data and clock in 65nm CMOS. VLSIC 2012: 144-145

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.