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"ASIC synthesis using Architecture Description Language."

Zheng Wang et al. (2012)

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DOI: 10.1109/VLSI-DAT.2012.6212614

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-26

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Zheng Wang, Xiao Wang, Anupam Chattopadhyay, Zoltan Endre Rakosi:
ASIC synthesis using Architecture Description Language. VLSI-DAT 2012: 1-4

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