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Andreas Kuehlmann
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- affiliation: University of California, Berkeley, USA
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2010 – 2019
- 2017
- [c58]Nadia Carlsten, Reed Sturtevant, Chris Wysopal, Andreas Kuehlmann, Robert K. Cunningham:
Panel: Building a Business around Secure Development. SecDev 2017: xiii-xiv - 2014
- [c57]Tobias Welp, Andreas Kuehlmann:
Property Directed Reachability for QF_BV with mixed type atomic reasoning units. ASP-DAC 2014: 738-743 - [c56]Tobias Welp, Andreas Kuehlmann:
Property directed invariant refinement for program verification. DATE 2014: 1-6 - 2013
- [c55]Tobias Welp, Andreas Kuehlmann:
QF BV model checking with property directed reachability. DATE 2013: 791-796 - 2012
- [j8]Tobias Welp, Nathan Kitchen, Andreas Kuehlmann:
Hardware Acceleration for Constraint Solving for Random Simulation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 31(5): 779-789 (2012) - [c54]Tobias Welp, Smita Krishnaswamy, Andreas Kuehlmann:
Generalized SAT-sweeping for post-mapping optimization. DAC 2012: 814-819 - [c53]Andreas Kuehlmann:
The Technology and Psychology of Testing Your Code as You Develop It. TAP@TOOLS 2012: 1 - 2011
- [c52]Alberto Puggelli, Tobias Welp, Andreas Kuehlmann, Alberto L. Sangiovanni-Vincentelli:
Are logic synthesis tools robust? DAC 2011: 633-638 - [c51]Tobias Welp, Andreas Kuehlmann:
An approach for dynamic selection of synthesis transformations based on Markov Decision Processes. DATE 2011: 1533-1536 - [c50]Petra Färm, Elena Dubrova, Andreas Kuehlmann:
Integrated logic synthesis using simulated annealing. ACM Great Lakes Symposium on VLSI 2011: 407-410 - 2010
- [c49]Andreas Kuehlmann, Raul Camposano, James Colgan, John Chilton, Samuel George, Rean Griffith, Paul Leventis, Deepak Singh:
Does IC design have a future in the clouds? DAC 2010: 412-414
2000 – 2009
- 2009
- [c48]Nathan Kitchen, Andreas Kuehlmann:
A Markov Chain Monte Carlo Sampler for Mixed Boolean/Integer Constraints. CAV 2009: 446-461 - [c47]Kenneth L. McMillan, Andreas Kuehlmann, Mooly Sagiv:
Generalizing DPLL to Richer Logics. CAV 2009: 462-476 - [c46]Eshel Haritan, Andreas Kuehlmann, Tina Jones, John Epperheimer, Jan M. Rabaey, Rahul Razdan, Naveen Gupta:
EDA in flux: should I stay or should I go? DAC 2009: 91-92 - [c45]Geoffrey Ying, Andreas Kuehlmann, Kenneth S. Kundert, Georges G. E. Gielen, Eric Grimme, Martin O'Leary, Sandeep Tare, Warren Wong:
Guess, solder, measure, repeat: how do I get my mixed-signal chip right? DAC 2009: 520-521 - [c44]Noah Ollikainen, Ellen Sentovich, Carlos Coelho, Andreas Kuehlmann, Tanja Kortemme:
SAT-based protein design. ICCAD 2009: 128-135 - 2008
- [c43]Juan C. Rey, Andreas Kuehlmann, Jan M. Rabaey, Cormac Conroy, Ted Vucurevich, Ikuya Kawasaki, Tuna B. Tarim:
Next generation wireless-multimedia devices: who is up for the challenge? DAC 2008: 353-354 - [c42]Andreas Kuehlmann, Anjan Bose, David E. Corman, Rob A. Rutenbar, Robert M. Manning, Anna Newman:
Verifying really complex systems: on earth and beyond. DAC 2008: 552-553 - 2007
- [c41]Satrajit Chatterjee, Alan Mishchenko, Robert K. Brayton, Andreas Kuehlmann:
On Resolution Proofs for Combinational Equivalence. DAC 2007: 600-605 - [c40]Nathan Kitchen, Andreas Kuehlmann:
Stimulus generation for constrained random simulation. ICCAD 2007: 258-265 - 2006
- [c39]Qi Zhu, Nathan Kitchen, Andreas Kuehlmann, Alberto L. Sangiovanni-Vincentelli:
SAT sweeping with local observability don't-cares. DAC 2006: 229-234 - [c38]Donald Chai, Andreas Kuehlmann:
Building a better Boolean matcher and symmetry detector. DATE 2006: 1079-1084 - [c37]Zile Wei, Donald Chai, A. Richard Newton, Andreas Kuehlmann:
Fast Boolean Matching with Don't Cares. ISQED 2006: 346-351 - [c36]Andreas Kuehlmann:
Integrated Design Flows - A Battered EDA Slogan or True Challenge for Tool Development and Algorithmic Research. VLSI Design 2006: 41 - 2005
- [j7]Donald Chai, Andreas Kuehlmann:
A fast pseudo-Boolean constraint solver. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 24(3): 305-317 (2005) - [c35]Petra Färm, Elena Dubrova, Andreas Kuehlmann:
Logic optimization using rule-based randomized search. ASP-DAC 2005: 998-1001 - [c34]Nina Amla, Xiaoqun Du, Andreas Kuehlmann, Robert P. Kurshan, Kenneth L. McMillan:
An Analysis of SAT-Based Model Checking Techniques in an Industrial Environment. CHARME 2005: 254-268 - [c33]Nathan Kitchen, Andreas Kuehlmann:
Temporal Decomposition for Logic Optimization. ICCD 2005: 697-702 - [c32]Zhong Xiu, David A. Papa, Philip Chong, Christoph Albrecht, Andreas Kuehlmann, Rob A. Rutenbar, Igor L. Markov:
Early research experience with OpenAccess gear: an open source development environment for physical design. ISPD 2005: 94-100 - 2004
- [j6]John Willis, Andreas Kuehlmann:
Design Automation TC Newsletter. IEEE Des. Test Comput. 21(2): 166- (2004) - [c31]Jason Baumgartner, Andreas Kuehlmann:
Enhanced Diameter Bounding via Structural. DATE 2004: 36-41 - [c30]Hari Mony, Jason Baumgartner, Viresh Paruthi, Robert Kanzelman, Andreas Kuehlmann:
Scalable Automated Verification via Expert-System Guided Transformations. FMCAD 2004: 159-173 - [c29]Andreas Kuehlmann:
Dynamic transition relation simplification for bounded property checking. ICCAD 2004: 50-57 - [c28]Aaron P. Hurst, Philip Chong, Andreas Kuehlmann:
Physical placement driven by sequential timing analysis. ICCAD 2004: 379-386 - [c27]Donald Chai, Andreas Kuehlmann:
Circuit-Based Preprocessing of ILP and Its Applications in Leakage Minimization and Power Estimation. ICCD 2004: 387-392 - 2003
- [c26]Donald Chai, Andreas Kuehlmann:
A fast pseudo-boolean constraint solver. DAC 2003: 830-835 - [c25]Cong Liu, Andreas Kuehlmann, Matthew W. Moskewicz:
CAMA: A Multi-Valued Satisfiability Solver. ICCAD 2003: 326-333 - [c24]Kaushik Ravindran, Andreas Kuehlmann, Ellen Sentovich:
Multi-Domain Clock Skew Scheduling. ICCAD 2003: 801-808 - [c23]Guoqiang Wang, Andreas Kuehlmann, Alberto L. Sangiovanni-Vincentelli:
Structural Detection of Symmetries in Boolean Functions. ICCD 2003: 498-503 - [c22]René Krenz, Elena Dubrova, Andreas Kuehlmann:
Fast Algorithm for Computing Spectral Transforms of Boolean and Multiple-Valued Functions on Circuit Representation. ISMVL 2003: 334-342 - 2002
- [j5]Andreas Kuehlmann, Viresh Paruthi, Florian Krohm, Malay K. Ganai:
Robust Boolean reasoning for equivalence checking and functional property verification. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 21(12): 1377-1394 (2002) - [c21]Jason Baumgartner, Andreas Kuehlmann, Jacob A. Abraham:
Property Checking via Structural Analysis. CAV 2002: 151-165 - [c20]René Krenz, Elena Dubrova, Andreas Kuehlmann:
Circuit-Based Evaluation of the Arithmetic Transform of Boolean Functions. IWLS 2002: 321-326 - [c19]HoonSang Jin, Andreas Kuehlmann, Fabio Somenzi:
Fine-Grain Conjunction Scheduling for Symbolic Reachability Analysis. TACAS 2002: 312-326 - [c18]Farhana Sheikh, Andreas Kuehlmann, Kurt Keutzer:
Minimum-power retiming for dual-supply CMOS circuits. Timing Issues in the Specification and Synthesis of Digital Systems 2002: 43-49 - [e1]Lawrence T. Pileggi, Andreas Kuehlmann:
Proceedings of the 2002 IEEE/ACM International Conference on Computer-aided Design, ICCAD 2002, San Jose, California, USA, November 10-14, 2002. ACM / IEEE Computer Society 2002, ISBN 0-7803-7607-2 [contents] - 2001
- [j4]Malay K. Ganai, Praveen Yalagandula, Adnan Aziz, Andreas Kuehlmann, Vigyan Singhal:
SIVA: A System for Coverage-Directed State Space Search. J. Electron. Test. 17(1): 11-27 (2001) - [c17]Andreas Kuehlmann, Jason Baumgartner:
Transformation-Based Verification Using Generalized Retiming. CAV 2001: 104-117 - [c16]Andreas Kuehlmann, Malay K. Ganai, Viresh Paruthi:
Circuit-based Boolean Reasoning. DAC 2001: 232-237 - [c15]Subarnarekha Sinha, Andreas Kuehlmann, Robert K. Brayton:
Sequential SPFDs. ICCAD 2001: 84-90 - [c14]Andreas Kuehlmann, Robert W. Dutton, Paul D. Franzon, Seth Copen Goldstein, Philip Luekes, Eric Parker, Thomas N. Theis:
Will Nanotechnology Change the Way We Design and Verify Systems? (Panel). ICCAD 2001: 174 - [c13]Jason Baumgartner, Andreas Kuehlmann:
Min-Area Retiming on Dynamic Circuit Structures. ICCAD 2001: 176-182 - [c12]Rajiv V. Joshi, Wei Hwang, Andreas Kuehlmann:
Design Of Provably Correct Storage Arrays. VLSI Design 2001: 196- - 2000
- [c11]Viresh Paruthi, Andreas Kuehlmann:
Equivalence Checking Combining a Structural SAT-Solver, BDDs, and Simulation. ICCD 2000: 459-464
1990 – 1999
- 1999
- [c10]Malay K. Ganai, Adnan Aziz, Andreas Kuehlmann:
Enhancing Simulation with BDDs and ATPG. DAC 1999: 385-390 - [c9]Andreas Kuehlmann, Kenneth L. McMillan, Robert K. Brayton:
Probabilistic state space search. ICCAD 1999: 574-579 - [c8]Sérgio Vale Aguiar Campos, Marcio Teixeira, Marius Minea, Andreas Kuehlmann, Edmund M. Clarke:
Model Checking Semi-Continuous Time Models Using BDDs. SMC@FLoC 1999: 75-87 - 1997
- [c7]Andreas Kuehlmann, Florian Krohm:
Equivalence Checking Using Cuts and Heaps. DAC 1997: 263-268 - 1996
- [c6]Florian Krohm, Andreas Kuehlmann, Arjen Mets:
The use of random simulation in formal verification. ICCD 1996: 371-376 - 1995
- [j3]Reinaldo A. Bergamaschi, Richard A. O'Connor, Leon Stok, Michael Z. Moricz, Shiv Prakash, Andreas Kuehlmann, D. Sreenivasa Rao:
High-level synthesis in an industrial environment. IBM J. Res. Dev. 39(1-2): 131-148 (1995) - [j2]Andreas Kuehlmann, Arvind Srinivasan, David P. LaPotin:
Verity - A formal verification program for custom CMOS circuits. IBM J. Res. Dev. 39(1-2): 149-166 (1995) - 1994
- [c5]Andreas Kuehlmann, David Ihsin Cheng, Arvind Srinivasan, David P. LaPotin:
Error Diagnosis for Transistor-Level Verification. DAC 1994: 218-224 - [c4]Andreas Kuehlmann, Lukas P. P. P. van Ginneken:
Grammar-Based Optimization of Synthesis Scenarios. ICCD 1994: 20-25 - 1993
- [j1]Reinaldo A. Bergamaschi, Andreas Kuehlmann:
A system for production use of high-level synthesis. IEEE Trans. Very Large Scale Integr. Syst. 1(3): 233-243 (1993) - 1992
- [c3]Reinaldo A. Bergamaschi, Donald A. Lobo, Andreas Kuehlmann:
Control Optimization in High-Level Synthesis Using Behavioral Don't Cares. DAC 1992: 657-661 - [c2]Andreas Kuehlmann, Reinaldo A. Bergamaschi:
Timing analysis in high-level synthesis. ICCAD 1992: 349-354 - [c1]Andreas Kuehlmann, Reinaldo A. Bergamaschi:
High-Level State Machine Specification and Synthesis. ICCD 1992: 536-539
Coauthor Index
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last updated on 2024-10-07 21:17 CEST by the dblp team
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