default search action
Fumio Arakawa
Person information
Refine list
refinements active!
zoomed in on ?? of ?? records
view refined list in
export refined list as
2020 – today
- 2022
- [j22]Fumio Arakawa, Makoto Ikeda:
Foreword. IEICE Trans. Electron. 105-C(6): 207-208 (2022) - [j21]Makoto Ikeda
, Fumio Arakawa
Special Issue on Cool Chips. IEEE Micro 42(2): 6-7 (2022) - 2021
- [j20]Fumio Arakawa, Makoto Ikeda:
Foreword. IEICE Trans. Electron. 104-C(6): 213-214 (2021) - 2020
- [j19]Fumio Arakawa, Makoto Ikeda:
Foreword. IEICE Trans. Electron. 103-C(3): 66-67 (2020)
2010 – 2019
- 2018
- [c12]Kesami Hagiwara, Tomoichi Hayashi, Shumpei Kawasaki, Fumio Arakawa, Oleg Endo, Hayato Nomura, Akira Tsukamoto, Duong Nguyen, Binh Nguyen, Anh Tran, Hoan Hyunh, Ikuo Kudoh, Cong-Kha Pham
A two-stage-pipeline CPU of SH-2 architecture implemented on FPGA and SoC for IoT, edge AI and robotic applications. COOL CHIPS 2018: 1-3 - 2017
- [j18]Fumio Arakawa, Makoto Ikeda:
Foreword. IEICE Trans. Electron. 100-C(3): 221-222 (2017) - 2016
- [j17]Yuta Suzuki, Kota Sata, Junichi Kako, Kohei Yamaguchi, Fumio Arakawa, Masato Edahiro:
Parallel Design of Feedback Control Systems Utilizing Dead Time for Embedded Multicore Processors. IEICE Trans. Electron. 99-C(4): 491-502 (2016) - [j16]Fumio Arakawa, Makoto Ikeda:
Foreword. IEICE Trans. Electron. 99-C(8): 899-900 (2016) - [c11]Makoto Ikeda, Fumio Arakawa:
Message from the program committee chairs. COOL Chips 2016: iv-v - 2015
- [j15]Fumio Arakawa, Makoto Ikeda:
Foreword. IEICE Trans. Electron. 98-C(7): 534-535 (2015) - 2014
- [c10]Fumio Arakawa:
Panel discussions: Toward wearable computing era, how COOL chip architecture and tools will evolve? COOL Chips 2014: 1-2 - [c9]Masaki Kondo, Fumio Arakawa, Masato Edahiro:
Establishing a standard interface between multi-manycore and software tools - SHIM. COOL Chips 2014: 1-3 - [c8]Yuta Suzuki, Kota Sata, Junichi Kako, Kohei Yamaguchi, Fumio Arakawa, Masato Edahiro:
Parallel design of control systems utilizing dead time for embedded multicore processors. COOL Chips 2014: 1-3 - [c7]Makoto Ikeda, Fumio Arakawa:
Message from the program committee chairs. COOL Chips 2014: iv-v - [c6]Riku Nakamura, Fumio Arakawa, Masato Edahiro:
Simple One-to-One Architecture for Parallel Execution of Embedded Control Systems. CPSNA 2014: 25-30 - 2013
- [j14]Makoto Ikeda, Fumio Arakawa:
Cool Chips. IEEE Micro 33(6): 4-5 (2013) - [c5]Makoto Ikeda, Fumio Arakawa:
Message from the Program Committee Chairs. COOL Chips 2013: iv-v - 2012
- [e1]Hiroaki Kobayashi, Makoto Ikeda, Fumio Arakawa:
2012 IEEE Symposium on Low-Power and High-Speed Chips, COOL Chips XV, Yokohama, Japan, April 18-20, 2012. IEEE Computer Society 2012, ISBN 978-1-4673-1201-1 [contents] - 2011
- [j13]Makoto Ikeda, Fumio Arakawa:
Cool Chips. IEEE Micro 31(6): 4-5 (2011)
2000 – 2009
- 2009
- [j12]Fumio Arakawa, Takashi Okada, Tomoichi Hayashi, Osamu Nishii, Toshihiro Hattori:
An embedded processor core for consumer appliances with 5.6 GFLOPS and 73M polygons/s FPU. Microprocess. Microsystems 33(4): 254-259 (2009) - [j11]Makoto Ikeda, Fumio Arakawa:
Guest Editors' Introduction: Cool Chips. IEEE Micro 29(6): 5-6 (2009) - 2006
- [j10]Tetsuya Yamada, Masahide Abe, Yusuke Nitta, Kenji Ogura, Manabu Kusaoke, Makoto Ishikawa, Motokazu Ozawa, Kiwamu Takada, Fumio Arakawa, Osamu Nishii, Toshihiro Hattori:
Reducing Consuming Clock Power Optimization of a 90 nm Embedded Processor Core. IEICE Trans. Electron. 89-C(3): 287-294 (2006) - [j9]Fumio Arakawa, Makoto Ishikawa, Yuki Kondo, Tatsuya Kamei, Osamu Nishii, Toshihiro Hattori:
SH-X: An embedded processor core for consumer appliances. J. Embed. Comput. 2(1): 83-90 (2006) - [j8]Fumio Arakawa, Tetsuya Yamada, Takashi Okada, Makoto Ishikawa, Yuki Kondo, Motokazu Ozawa, Tomoyuki Kodama, Osamu Nishii, Toshihiro Hattori, Tatsuya Kamei, Junichi Nishimoto, Shinichi Yoshioka:
Development of processor cores for digital consumer appliances. Syst. Comput. Jpn. 37(3): 10-19 (2006) - 2005
- [j7]Makoto Ishikawa, Tatsuya Kamei, Yuki Kondo, Masanao Yamaoka, Yasuhisa Shimazaki, Motokazu Ozawa, Saneaki Tamaki, Mikio Furuyama, Tadashi Hoshi, Fumio Arakawa, Osamu Nishii, Kenji Hirose, Shinichi Yoshioka, Toshihiro Hattori:
A 4500 MIPS/W, 86 µA Resume-Standby, 11 µA Ultra-Standby Application Processor for 3G Cellular Phones. IEICE Trans. Electron. 88-C(4): 528-535 (2005) - [j6]Fumio Arakawa, Tomoichi Hayashi, Masakazu Nishibori:
An Exact Leading Non-Zero Detector for a Floating-Point Unit. IEICE Trans. Electron. 88-C(4): 570-575 (2005) - [j5]Fumio Arakawa, Makoto Ishikawa, Yuki Kondo, Tatsuya Kamei, Motokazu Ozawa, Osamu Nishii, Toshihiro Hattori:
SH-X: an embedded processor core for consumer appliances. SIGARCH Comput. Archit. News 33(3): 33-40 (2005) - [c4]Tetsuya Yamada, Masahide Abe, Yusuke Nitta, Kenji Ogura, Manabu Kusaoke, Makoto Ishikawa, Motokazu Ozawa, Kiwamu Takada, Fumio Arakawa, Osamu Nishii, Toshihiro Hattori:
Low-Power Design of 90-nm SuperH Processor Core. ICCD 2005: 258-266 - 2004
- [c3]Fumio Arakawa, Makoto Ishikawa, Yuki Kondo, Tatsuya Kamei, Motokazu Ozawa, Osamu Nishii, Toshihiro Hattori:
SH-X: an embedded processor core for consumer appliances. MEDEA@PACT 2004: 33-40 - [c2]Makoto Saen, Motohiro Nakagawa, Junichi Nishimoto, Tomoyuki Kodama, Fumio Arakawa:
Transparent SOC: on-chip analyzing techniques and implementation for embedded processor. SoCC 2004: 51-54 - 2000
- [j4]Prasenjit Biswas, Atsushi Hasegawa, Srinivas Mandaville, Mark Debbage, Andy Sturges, Fumio Arakawa, Yasuhiko Saito, Kunio Uchiyama:
SH-5: The 64-Bit SuperH Architecture. IEEE Micro 20(4): 28-39 (2000)
1990 – 1999
- 1998
- [j3]Fumio Arakawa, Osamu Nishii, Kunio Uchiyama, Norio Nakagawa:
SH4 RISC multimedia microprocessor. IEEE Micro 18(2): 26-34 (1998) - 1993
- [j2]Kunio Uchiyama, Fumio Arakawa, Susumu Narita, Hirokazu Aoki, Ikuya Kawasaki, Shigezumi Matsui, Mitsuyoshi Yamamoto, Norio Nakagawa, Ikuo Kudo:
The Gmicro/500 superscalar microprocessor with branch buffers. IEEE Micro 13(5): 12-22 (1993) - [c1]Susumu Narita, Fumio Arakawa, Kunio Uchiyama, Ikuya Kawasaki:
Design Methodology for GMICROTM/500 TRON Microprocessor. ICCD 1993: 253-257 - 1990
- [j1]Kazuhiko Iwasaki, Fumio Arakawa:
An analysis of the aliasing probability of multiple-input signature registers in the case of a 2m-ary symmetric channel. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 9(4): 427-438 (1990)
Coauthor Index
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.
Unpaywalled article links
Add open access links from to the list of external document links (if available).
Privacy notice: By enabling the option above, your browser will contact the API of unpaywall.org to load hyperlinks to open access articles. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Unpaywall privacy policy.
Archived links via Wayback Machine
For web page which are no longer available, try to retrieve content from the of the Internet Archive (if available).
Privacy notice: By enabling the option above, your browser will contact the API of archive.org to check for archived content of web pages that are no longer available. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Internet Archive privacy policy.
Reference lists
Add a list of references from ,
, and
to record detail pages.
load references from crossref.org and opencitations.net
Privacy notice: By enabling the option above, your browser will contact the APIs of crossref.org, opencitations.net, and semanticscholar.org to load article reference information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Crossref privacy policy and the OpenCitations privacy policy, as well as the AI2 Privacy Policy covering Semantic Scholar.
Citation data
Add a list of citing articles from and
to record detail pages.
load citations from opencitations.net
Privacy notice: By enabling the option above, your browser will contact the API of opencitations.net and semanticscholar.org to load citation information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the OpenCitations privacy policy as well as the AI2 Privacy Policy covering Semantic Scholar.
OpenAlex data
Load additional information about publications from .
Privacy notice: By enabling the option above, your browser will contact the API of openalex.org to load additional information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the information given by OpenAlex.
last updated on 2024-04-25 05:54 CEST by the dblp team
all metadata released as open data under CC0 1.0 license
see also: Terms of Use | Privacy Policy | Imprint
dblp was originally created in 1993 at:
since 2018, dblp has been operated and maintained by:
the dblp computer science bibliography is funded and supported by: