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Narayanan Krishnamurthy
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2010 – 2019
- 2019
- [j8]Vyacheslav N. Romanov, Narayanan Krishnamurthy, Amit K. Verma, Laura S. Bruckman, Roger H. French, Jennifer L. W. Carter, Jeffrey A. Hawk:
Materials data analytics for 9% Cr family steel. Stat. Anal. Data Min. 12(4): 290-301 (2019)
2000 – 2009
- 2005
- [j7]Prabhat Mishra, Nikil D. Dutt, Narayanan Krishnamurthy, Magdy S. Abadir:
A methodology for validation of microprocessors using symbolic simulation. Int. J. Embed. Syst. 1(1/2): 14-22 (2005) - 2004
- [j6]Prabhat Mishra, Nikil D. Dutt, Narayanan Krishnamurthy, Magdy S. Abadir:
A Top-Down Methodology for Microprocessor Validation. IEEE Des. Test Comput. 21(2): 122-131 (2004) - [j5]Jayanta Bhadra, Narayanan Krishnamurthy, Magdy S. Abadir:
Enhanced Equivalence Checking: Toward a Solidarity of Functional Verification and Manufacturing Test Generation. IEEE Des. Test Comput. 21(6): 494-502 (2004) - [c5]Narayanan Krishnamurthy, Jayanta Bhadra, Magdy S. Abadir, Jacob A. Abraham:
Towards The Complete Elimination of Gate/Switch Level Simulations. VLSI Design 2004: 115- - 2003
- [j4]Magdy S. Abadir, Ken Albin, John Havlicek, Narayanan Krishnamurthy, Andrew K. Martin:
Formal Verification Successes at Motorola. Formal Methods Syst. Des. 22(2): 117-123 (2003) - [c4]Jayanta Bhadra, Narayanan Krishnamurthy, Magdy S. Abadir:
A Methodology for Validating Manufacturing Test Vector Suites for Custom Designed Scan-Based Circuits. MTV 2003: 32-37 - 2002
- [c3]Jayanta Bhadra, Narayanan Krishnamurthy:
Automatic Generation of Design Constraints in Verifying High Performance Embedded Dynamic Circuits. ITC 2002: 213-222 - [c2]Narayanan Krishnamurthy, Jayanta Bhadra, Magdy S. Abadir, Jacob A. Abraham:
Is State Mapping Essential for Equivalence Checking Custom Memories in Scan-Based Designs? VTS 2002: 275-280 - 2001
- [j3]Narayanan Krishnamurthy, Magdy S. Abadir, Andrew K. Martin, Jacob A. Abraham:
Design and Development Paradigm for Industrial Formal Verification CAD Tools. IEEE Des. Test Comput. 18(4): 26-35 (2001) - 2000
- [j2]Narayanan Krishnamurthy, Andrew K. Martin, Magdy S. Abadir, Jacob A. Abraham:
Validating PowerPC Microprocessor Custom Memories. IEEE Des. Test Comput. 17(4): 61-76 (2000) - [c1]Narayanan Krishnamurthy, Andrew K. Martin, Magdy S. Abadir, Jacob A. Abraham:
Validation of PowerPC(tm) Custom Memories using Symbolic Simulation. VTS 2000: 9-14
1990 – 1999
- 1999
- [j1]Zeyad Alkhalifa, V. S. S. Nair, Narayanan Krishnamurthy, Jacob A. Abraham:
Design and Evaluation of System-Level Checks for On-Line Control Flow Error Detection. IEEE Trans. Parallel Distributed Syst. 10(6): 627-641 (1999)
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