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Simon J. Hollis
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2010 – 2019
- 2019
- [j8]Dawei Liu
, Simon J. Hollis, Bernard H. Stark
A New Design Technique for Sub-Nanosecond Delay and 200 V/ns Power Supply Slew-Tolerant Floating Voltage Level Shifters for GaN SMPS. IEEE Trans. Circuits Syst. I Regul. Pap. 66-I(3): 1280-1290 (2019) - 2016
- [j7]Dawei Liu
Design of 370-ps Delay Floating-Voltage Level Shifters With 30-V/ns Power Supply Slew Tolerance. IEEE Trans. Circuits Syst. II Express Briefs 63-II(7): 688-692 (2016) - [c7]Simon J. Hollis, Steve Kerrison:
Swallow: Building an energy-transparent many-core embedded real-time system. DATE 2016: 73-78 - [c6]Simon J. Hollis, Edward Ma, Radu Marculescu
nOS: A nano-sized distributed operating system for many-core embedded systems. ICCD 2016: 177-184 - 2015
- [j6]James Pallister, Simon J. Hollis, Jeremy Bennett:
Identifying Compiler Options to Minimize Energy Consumption for Embedded Platforms. Comput. J. 58(1): 95-109 (2015) - [c5]James Pallister, Kerstin Eder
Optimizing the flash-RAM energy trade-off in deeply embedded systems. CGO 2015: 115-124 - [i8]Simon J. Hollis, Steve Kerrison:
Overview of Swallow - A Scalable 480-core System for Investigating the Performance and Energy Efficiency of Many-core Applications and Operating Systems. CoRR abs/1504.06357 (2015) - 2014
- [j5]Guang Yang, Bernard H. Stark, Simon J. Hollis, Stephen G. Burrow:
Challenges for Energy Harvesting Systems Under Intermittent Excitation. IEEE J. Emerg. Sel. Topics Circuits Syst. 4(3): 364-374 (2014) - [j4]Arash Beldachi, Simon J. Hollis, José L. Núñez-Yáñez:
eXtended Torus routing algorithm for networks-on-chip: a routing algorithm for dynamically reconfigurable networks-on-chip. IET Comput. Digit. Tech. 8(3): 148-162 (2014) - [j3]Simon J. Hollis, Chris Jackson, Paul Bogdan
Exploiting Emergence in On-Chip Interconnects. IEEE Trans. Computers 63(3): 570-582 (2014) - [c4]James Pallister, Kerstin Eder, Simon J. Hollis, Jeremy Bennett:
A high-level model of embedded flash energy consumption. CASES 2014: 20:1-20:9 - [i7]James Pallister, Kerstin Eder, Simon J. Hollis, Jeremy Bennett:
A high-level model of embedded flash energy consumption. CoRR abs/1404.1602 (2014) - [i6]James Pallister, Kerstin Eder, Simon J. Hollis:
Optimizing the flash-RAM energy trade-off in deeply embedded systems. CoRR abs/1406.0403 (2014) - 2013
- [i5]James Pallister, Simon J. Hollis, Jeremy Bennett:
Identifying Compiler Options to Minimise Energy Consumption for Embedded Platforms. CoRR abs/1303.6485 (2013) - [i4]James Pallister, Simon J. Hollis, Jeremy Bennett:
BEEBS: Open Benchmarks for Energy Measurements on Embedded Platforms. CoRR abs/1308.5174 (2013) - 2012
- [i3]James W. Hanlon, Simon J. Hollis, David May:
Scalable data abstractions for distributed parallel computations. CoRR abs/1210.1157 (2012) - [i2]James W. Hanlon, Simon J. Hollis, David May:
Emulating a large memory sequential machine with a collection of small memory ones. CoRR abs/1210.1158 (2012) - 2011
- [j2]Simon J. Hollis, Chris Jackson:
Implementation and Evaluation of Skip-Links: A Dynamically Reconfiguring Topology for Energy-Efficient NoCs. Int. J. Embed. Real Time Commun. Syst. 2(3): 21-49 (2011) - [j1]Chris Jackson, Simon J. Hollis:
A deadlock-free routing algorithm for dynamically reconfigurable Networks-on-Chip. Microprocess. Microsystems 35(2): 139-151 (2011) - [c3]James W. Hanlon, Simon J. Hollis:
Fast Distributed Process Creation with the XMOS XS1 Architecture. CPA 2011: 195-207 - [i1]James W. Hanlon, Simon J. Hollis:
Fast Distributed Process Creation with the XMOS XS1 Architecture. CoRR abs/1105.3843 (2011) - 2010
- [c2]Chris Jackson, Simon J. Hollis:
Skip-links: A dynamically reconfiguring topology for energy-efficient NoCs. SoC 2010: 49-54
2000 – 2009
- 2009
- [c1]Simon J. Hollis, Chris Jackson:
When does Network-on-Chip bypassing make sense? SoCC 2009: 143-146
Coauthor Index
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