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Denis Dutoit
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2020 – today
- 2021
- [j4]Pascal Vivet
, Eric Guthmuller
IntAct: A 96-Core Processor With Six Chiplets 3D-Stacked on an Active Interposer With Distributed Interconnects and Integrated Power Management. IEEE J. Solid State Circuits 56(1): 79-97 (2021) - 2020
- [c14]Yvain Thonnart
POPSTAR: a Robust Modular Optical NoC Architecture for Chiplet-based 3D Integrated Systems. DATE 2020: 1456-1461 - [c13]Pascal Vivet
2.3 A 220GOPS 96-Core Processor with 6 Chiplets 3D-Stacked on an Active Interposer Offering 0.6ns/mm Latency, 3Tb/s/mm2 Inter-Chiplet Interconnects and 156mW/mm2@ 82%-Peak-Efficiency DC-DC Converters. ISSCC 2020: 46-48
2010 – 2019
- 2017
- [j3]Pascal Vivet
A 4 × 4 × 2 Homogeneous Scalable 3D Network-on-Chip Circuit With 326 MFlit/s 0.66 pJ/b Robust and Fault Tolerant Asynchronous 3D Links. IEEE J. Solid State Circuits 52(1): 33-49 (2017) - [c12]Alvise Rigo, Christian Pinto, Kevin Pouget, Daniel Raho, Denis Dutoit, Pierre-Yves Martinez, Chris Doran, Luca Benini
Paving the Way Towards a Highly Energy-Efficient and Highly Integrated Compute Node for the Exascale Revolution: The ExaNoDe Approach. DSD 2017: 486-493 - 2016
- [j2]Perceval Coudrain
Experimental Insights Into Thermal Dissipation in TSV-Based 3-D Integrated Circuits. IEEE Des. Test 33(3): 21-36 (2016) - 2015
- [c11]Pascal Vivet, Christian Bernard, Fabien Clermidy, Denis Dutoit, Eric Guthmuller
3D advanced integration technology for heterogeneous systems. 3DIC 2015: FS6.1-FS6.3 - 2014
- [c10]Francesco Beneventi, Andrea Bartolini, Pascal Vivet, Denis Dutoit, Luca Benini:
Thermal analysis and model identification techniques for a logic + WIDEIO stacked DRAM test chip. DATE 2014: 1-4 - [c9]Yves Durand, Paul M. Carpenter
EUROSERVER: Energy Efficient Node for European Micro-Servers. DSD 2014: 206-213 - 2013
- [c8]Cristiano Santos, Pascal Vivet
System-level thermal modeling for 3D circuits: Characterization with a 65nm memory-on-logic circuit. 3DIC 2013: 1-6 - [c7]Denis Dutoit, Eric Guthmuller
3D integration for power-efficient computing. DATE 2013: 779-784 - [c6]Fabien Clermidy, Denis Dutoit, Eric Guthmuller
3D stacking for multi-core architectures: From WIDEIO to distributed caches. ISCAS 2013: 537-540 - 2012
- [c5]Diego Melpignano, Luca Benini
Platform 2012, a many-core computing accelerator for embedded SoCs: performance evaluation of visual analytics applications. DAC 2012: 1137-1142 - 2011
- [c4]Benny Akesson
Memory controllers for high-performance and real-time MPSoCs: requirements, architectures, and future trends. CODES+ISSS 2011: 3-12 - [c3]Fabien Clermidy, Florian Darve, Denis Dutoit, Walid Lafi, Pascal Vivet:
3D Embedded multi-core: Some perspectives. DATE 2011: 1327-1332 - [c2]Fabien Clermidy, Nicolas Cassiau, N. Coste, Denis Dutoit, M. Fantini, Dimitri Ktenas, Romain Lemaire, L. Stefanizzi:
Reconfiguration of a 3GPP-LTE telecommunication application on a 22-core NoC-based system-on-chip. NOCS 2011: 261-262 - [c1]Pascal Vivet
3D NoC using through silicon Via: An asynchronous implementation. VLSI-SoC 2011: 232-237
2000 – 2009
- 2006
- [j1]Andrew Cofler, Francois Druilhe, Denis Dutoit
A reprogrammable EDGE baseband and multimedia handset SoC with 6-mbit embedded DRAM. IEEE J. Solid State Circuits 41(1): 97-106 (2006)
Coauthor Index
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