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Muzaffer O. Simsir

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2010 – 2019

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2010
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  - conf/nanoarch/SimsirBJ10
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Muzaffer O. Simsir, Ajay N. Bhoj, Niraj K. Jha:
Fault modeling for FinFET circuits. NANOARCH 2010: 41-46
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Muzaffer O. Simsir, Niraj K. Jha:
NanoV: Nanowire-based VLSI design. NANOARCH 2010: 53-58

2000 – 2009

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2009
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Muzaffer O. Simsir, Srihari Cadambi, Franjo Ivancic, Martin Rötteler, Niraj K. Jha:
A hybrid nano-CMOS architecture for defect and fault tolerance. ACM J. Emerg. Technol. Comput. Syst. 5(3): 14:1-14:26 (2009)
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Muzaffer O. Simsir, Niraj K. Jha:
Thermal characterization of BIST, scan design and sequential test methodologies. ITC 2009: 1-9
2008
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Muzaffer O. Simsir, Srihari Cadambi, Franjo Ivancic, Martin Rötteler, Niraj K. Jha:
Fault-Tolerant Computing Using a Hybrid Nano-CMOS Architecture. VLSI Design 2008: 435-440

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