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Ashwin Raghunathan
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2020 – today
- 2022
- [j2]Sachin Kalia
, Salvatore Finocchiaro, Tolga Dinc
A Sub-100 Fs RMSjitter 20 GHz Fractional-N Analog PLL With a BAW Resonator Based On-Chip 2.5 GHz Reference. IEEE J. Solid State Circuits 57(5): 1372-1384 (2022) - 2020
- [c5]Ashwin Raghunathan, Thomas H. Lee:
A Simple Linear Time-Variant Theory of Superregeneration. ISCAS 2020: 1-5
2010 – 2019
- 2018
- [c4]Ashwin Raghunathan, Thomas H. Lee:
A 125 pJ/hit 5 mW 28 GHz Superregenerative Receiver with Automatic Gain Control and Energy Efficient Startup for Burst Mode IoE Applications. ESSCIRC 2018: 70-73 - 2010
- [j1]Ramyanshu Datta, Antony Sebastine, Ashwin Raghunathan, Gary D. Carpenter, Kevin J. Nowka
On-Chip Delay Measurement Based Response Analysis for Timing Characterization. J. Electron. Test. 26(6): 599-619 (2010)
2000 – 2009
- 2004
- [c3]Ramyanshu Datta, Antony Sebastine, Ashwin Raghunathan, Jacob A. Abraham:
On-chip delay measurement for silicon debug. ACM Great Lakes Symposium on VLSI 2004: 145-148 - [c2]Ashwin Raghunathan, Ji Hwan (Paul) Chun, Jacob A. Abraham, Abhijit Chatterjee:
Quasi-Oscillation Based Test for Improved Prediction of Analog Performance Parameters. ITC 2004: 252-261 - [c1]Ashwin Raghunathan, Hongjoong Shin, Jacob A. Abraham, Abhijit Chatterjee:
Prediction of Analog Performance Parameters Using Oscillation Based Test. VTS 2004: 377-382
Coauthor Index
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