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Valentina Andreeva
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2020 – today
- 2022
- [c13]Andrey Laputenko, Nina Yevtushenko, Valentina Andreeva, Anzhela Yu. Matrosova:
Deriving FSM-based tests using $a, b-\text{faults}$ for Logic Circuits. ISVLSI 2022: 80-85 - 2021
- [c12]Anjela Yu. Matrosova, Valentina Andreeva, V. Tychinskiy:
SAT Solvers Application of Deriving All Test Pairs Detecting Robust Testable PDFs. EWDTS 2021: 1-4
2010 – 2019
- 2019
- [c11]Anjela Yu. Matrosova, Valentina Andreeva, V. Tychinskiy:
Deriving Low Power Test Sequences Detecting Robust Testable PDFs. EWDTS 2019: 1-4 - 2018
- [c10]Sergey Ostanin, Valentina Andreeva, Natalia Butorina, D. Tretyakov:
Fault-Tolerant Synchronous FSM Network Design for Path Delay Faults. EWDTS 2018: 1-4 - 2017
- [c9]Valentina Andreeva, Semyon Chernyshov:
Finding the shortest transfer sequence of sequential circuit based on simplified ROBDDs. EWDTS 2017: 1-3 - 2016
- [c8]Anjela Yu. Matrosova, Sergey Ostanin, Valentina Andreeva:
Patching circuit design based on reserved CLBs. AQTR 2016: 1-5 - [c7]Anzhela Yu. Matrosova, Valentina Andreeva, Alexey Melnikov:
ROBDDs application for finding the shortest transfer sequence of sequential circuit or only revealing existence of this sequence without deriving the sequence itself. EWDTS 2016: 1-4 - 2015
- [c6]Anzhela Yu. Matrosova, Valentina Andreeva, V. Tomkov:
Fully delay and multiple stuck-at faults testable FSM design. EWDTS 2015: 1-4 - 2014
- [c5]Valentina Andreeva, Kirill A. Sorudeykin:
Decomposition tree - based compaction procedure with iteration steps for interconversional layouts of tasks. EWDTS 2014: 1-6 - 2013
- [c4]Valentina Andreeva, Kirill A. Sorudeykin:
A research of heuristic optimization approaches to the test set compaction procedure based on a decomposition tree for combinational circuits. EWDTS 2013: 1-6 - 2011
- [c3]Valentina Andreeva:
Test set compaction procedure for combinational circuits based on decomposition tree. EWDTS 2011: 251-254 - 2010
- [c2]Valentina Andreeva:
Test minimization technique for multiple stuck-at faults of combinational circuit. EWDTS 2010: 168-170
2000 – 2009
- 2002
- [c1]Anzhela Yu. Matrosova, Valentina Andreeva, Yu. Sedov:
Survivable Discrete Circuits Design. IOLTW 2002: 13-
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