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Jaesik Lee
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2010 – 2019
- 2019
- [j7]Jaesik Lee, Chulung Lee
, Jaejin Kim, Seiho Kim, Hyeonu Im:
An Empirical Study on the Effect of Innovation Financing on Technology Innovation Competency: Business Performance of SMEs in Korea. J. Electron. Commer. Organ. 17(1): 1-15 (2019) - 2015
- [c15]Seokhwa Song, JaeSeung Lee, Jaesik Lee, Moon-Seog Jun:
User Authentication Method Design Based on Biometrics in a Multi-cloud Environment. CSA/CUTE 2015: 283-288 - 2014
- [c14]Jaesik Lee, Youngseok Oh:
A Study on Providing the Reliable and Secure SMS Authentication Service. UIC/ATC/ScalCom 2014: 620-624 - 2012
- [c13]Mijung Joo, Hyunmin Kang, Hyunjung Shin, Jaesik Lee:
Differential Effects of the Cultural Orientation Dimensions on Global Precedence. CogSci 2012 - [c12]Yoonkyoung Lee, Bia Kim, Yiwon Hyun, Cheon Woo Shin, Jaesik Lee, Hyunjung Shin:
The influence of cultural dispositions on the scene perception. CogSci 2012 - 2010
- [j6]Jaesik Lee, Joseph Weiner, Young-Kai Chen:
A 20-GS/s 5-b SiGe ADC for 40-Gb/s Coherent Optical Links. IEEE Trans. Circuits Syst. I Regul. Pap. 57-I(10): 2665-2674 (2010)
2000 – 2009
- 2008
- [c11]Hongjoong Sin, Sungju Lee, Jangsu Lee, Seunghwan Yoo, Sanghyuc Lee, Jaesik Lee, Sungchun Kim:
Self-organized Cluster Based Multi-hop Routing for Wireless Sensor Networks. APNOMS 2008: 499-502 - [c10]Jaesik Lee, Joseph Weiner, Pascal Roux, Andreas Leven, Young-Kai Chen:
A 24GS/s 5-b ADC with closed-loop THA in 0.18μm SiGe BiCMOS. CICC 2008: 313-316 - 2007
- [c9]Jaesik Lee, Joseph Weiner, Hsin-Hung Chen, Yves Baeyens, Vladimir Aksyuk
CMOS-Based MEMS Mirror Driver for Maskless Lithography Systems. CICC 2007: 401-404 - [c8]Bia Kim, Jaesik Lee:
Analysis of Enumeration Strategy Use in the ACT-R Cognitive Architecture. ICNC (5) 2007: 526-530 - [c7]Jaesik Lee, Yves Baeyens, Joseph Weiner, Young-Kai Chen:
A 50GS/s Distributed T/H Amplifier in 0.18μm SiGe BiCMOS. ISSCC 2007: 466-616 - 2006
- [c6]Ying-Kuang Chen, Yves Baeyens, Nils Weimann, Jaesik Lee, Joe Weiner, Vincent Houtsma, Yang Yang:
Recent Advances in III-V Electronics. CICC 2006: 687-690 - 2004
- [j5]Jaesik Lee, Yoonjong Huh, Peter Bendix, Sung-Mo Kang:
Design of ESD power protection with diode structures for mixed-power supply systems. IEEE J. Solid State Circuits 39(1): 260-264 (2004) - [j4]Jaesik Lee, Pascal Roux, Ut-Va Koc, Thomas Link, Yves Baeyens, Young-Kai Chen:
A 5-b 10-GSample/s a/D converter for 10-gb/s optical receivers. IEEE J. Solid State Circuits 39(10): 1671-1679 (2004) - [j3]Joseph S. Weiner, Jaesik Lee, Andreas Leven, Yves Baeyens, Vincent Houtsma, George Georgiou, Yang Yang, John Frackoviak, Alaric Tate, Roberto Reyes, Rose F. Kopf, Wei-Jer Sung, Nils Weimann, Young-Kai Chen:
An InGaAs-InP HBT differential transimpedance amplifier with 47-GHz bandwidth. IEEE J. Solid State Circuits 39(10): 1720-1723 (2004) - [c5]Ut-Va Koc, Jaesik Lee:
Direct RF sampling continuous-time bandpass Delta-Sigma A/D converter design for 3G wireless applications. ISCAS (1) 2004: 409-412 - 2003
- [j2]Jaesik Lee, Andreas Leven, Joseph S. Weiner, Yves Baeyens, Yang Yang, Wei-Jer Sung, John Frackoviak, Rose F. Kopf, Young-Kai Chen:
A 6-b 12-GSamples/s track-and-hold amplifier in InP DHBT technology. IEEE J. Solid State Circuits 38(9): 1533-1539 (2003) - [j1]Jaesik Lee, Ki-Wook Kim, Yoonjong Huh, Peter Bendix, Sung-Mo Kang:
Chip-level charged-device modeling and simulation in CMOS integrated circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 22(1): 67-81 (2003) - 2002
- [c4]Jaesik Lee, Ki-Wook Kim, Sung-Mo Kang:
VeriCDF: a new verification methodology for charged device failures. DAC 2002: 874-879 - 2001
- [b1]Jaesik Lee:
Design for ESD Reliability in High-Frequency Mixed-Signal Integrated Circuits. University of Illinois Urbana-Champaign, USA, 2001 - [c3]Jaesik Lee, Yoonjong Huh, Peter Bendix, Sung-Mo Kang:
Understanding and Addressing the Noise Induced By Electrostatic Discharge in Multiple Power Supply Systems. ICCD 2001: 406-414 - [c2]Jaesik Lee, Yoonjong Huh, Peter Bendix, Sung-Mo Kang:
Design-for-ESD-reliability for high-frequency I/O interface circuits in deep-submicron CMOS technology. ISCAS (4) 2001: 746-749 - 2000
- [c1]Chulwoo Kim, Jaesik Lee, Kwang-Hyun Baek
High-Performance, Low-Power Skewed Static Logic in Very Deep-Submicron (VDSM) Technology. ICCD 2000: 59-64
Coauthor Index
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