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Jens-Peter Kaps
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- affiliation: George Mason University, Fairfax VA, USA
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2020 – today
- 2023
- [c40]Eduardo Ferrufino, Luke Beckwith, Abubakr Abdulgadir, Jens-Peter Kaps:
FOBOS 3: An Open-Source Platform for Side-Channel Analysis and Benchmarking. ASHES@CCS 2023: 5-14 - [i9]Kamyar Mohajerani, Luke Beckwith, Abubakr Abdulgadir, Eduardo Ferrufino, Jens-Peter Kaps, Kris Gaj:
SCA Evaluation and Benchmarking of Finalists in the NIST Lightweight Cryptography Standardization Process. IACR Cryptol. ePrint Arch. 2023: 484 (2023) - 2022
- [c39]Abubakr Abdulgadir, Jens-Peter Kaps, Ahmad Salman:
Enhancing Information Security Courses With a Remotely Accessible Side-Channel Analysis Setup. ACM Great Lakes Symposium on VLSI 2022: 531-536 - 2021
- [c38]Kamyar Mohajerani, Richard Haeussler, Rishub Nagpal, Farnoud Farahmand, Abubakr Abdulgadir, Jens-Peter Kaps, Kris Gaj:
Hardware Benchmarking of Round 2 Candidates in the NIST Lightweight Cryptography Standardization Process. DATE 2021: 164-169 - [c37]Abubakr Abdulgadir, Sammy Lin, Farnoud Farahmand, Jens-Peter Kaps, Kris Gaj:
Side-channel Resistant Implementations of a Novel Lightweight Authenticated Cipher with Application to Hardware Security. ACM Great Lakes Symposium on VLSI 2021: 229-234 - [c36]Abubakr Abdulgadir, Kamyar Mohajerani, Viet Ba Dang, Jens-Peter Kaps, Kris Gaj:
A Lightweight Implementation of Saber Resistant Against Side-Channel Attacks. INDOCRYPT 2021: 224-245 - [i8]Abubakr Abdulgadir, Kamyar Mohajerani, Viet Ba Dang, Jens-Peter Kaps, Kris Gaj:
A Lightweight Implementation of Saber Resistant Against Side-Channel Attacks. IACR Cryptol. ePrint Arch. 2021: 1452 (2021) - 2020
- [c35]Javad Bahrami, Viet Ba Dang, Abubakr Abdulgadir, Khaled N. Khasawneh, Jens-Peter Kaps, Kris Gaj:
Lightweight Implementation of the LowMC Block Cipher Protected Against Side-Channel Attacks. ASHES@CCS 2020: 45-56 - [i7]Kamyar Mohajerani, Richard Haeussler, Rishub Nagpal, Farnoud Farahmand, Abubakr Abdulgadir, Jens-Peter Kaps, Kris Gaj:
FPGA Benchmarking of Round 2 Candidates in the NIST Lightweight Cryptography Standardization Process: Methodology, Metrics, Tools, and Results. IACR Cryptol. ePrint Arch. 2020: 1207 (2020)
2010 – 2019
- 2019
- [c34]Abubakr Abdulgadir, William Diehl, Jens-Peter Kaps:
An Open-Source Platform for Evaluation of Hardware Implementations of Lightweight Authenticated Ciphers. ReConFig 2019: 1-5 - [i6]William Diehl, Farnoud Farahmand, Abubakr Abdulgadir, Jens-Peter Kaps, Kris Gaj:
Face-off between the CAESAR Lightweight Finalists: ACORN vs. Ascon. IACR Cryptol. ePrint Arch. 2019: 184 (2019) - [i5]William Diehl, Abubakr Abdulgadir, Jens-Peter Kaps:
Vulnerability Analysis of a Soft Core Processor through Fine-grain Power Profiling. IACR Cryptol. ePrint Arch. 2019: 742 (2019) - [i4]Jens-Peter Kaps, William Diehl, Michael Tempelmeier, Farnoud Farahmand, Ekawat Homsirikamol, Kris Gaj:
A Comprehensive Framework for Fair and Efficient Benchmarking of Hardware Implementations of Lightweight Cryptography. IACR Cryptol. ePrint Arch. 2019: 1273 (2019) - 2018
- [j6]William Diehl, Abubakr Abdulgadir, Jens-Peter Kaps, Kris Gaj:
Comparing the Cost of Protecting Selected Lightweight Block Ciphers against Differential Power Analysis in Low-Cost FPGAs. Comput. 7(2): 28 (2018) - [j5]William Diehl, Abubakr Abdulgadir, Farnoud Farahmand, Jens-Peter Kaps, Kris Gaj:
Comparison of Cost of Protection against Differential Power Analysis of Selected Authenticated Ciphers. Cryptogr. 2(3): 26 (2018) - [c33]William Diehl, Farnoud Farahmand, Abubakr Abdulgadir, Jens-Peter Kaps, Kris Gaj:
Fixing the CLOC with Fine-grain Leakage Analysis. ASHES@CCS 2018: 75-80 - [c32]Farnoud Farahmand, William Diehl, Abubakr Abdulgadir, Jens-Peter Kaps, Kris Gaj:
Improved Lightweight Implementations of CAESAR Authenticated Ciphers. FCCM 2018: 29-36 - [c31]Farnoud Farahmand, Abubakr Abdulgadir, Jens-Peter Kaps, Kris Gaj:
Face-off Between the CAESAR Lightweight Finalists: ACORN vs. Ascon. FPT 2018: 330-333 - [c30]Michael Tempelmeier, Fabrizio De Santis, Georg Sigl, Jens-Peter Kaps:
The CAESAR-API in the real world - Towards a fair evaluation of hardware CAESAR candidates. HOST 2018: 73-80 - [c29]William Diehl, Abubakr Abdulgadir, Farnoud Farahmand, Jens-Peter Kaps, Kris Gaj:
Comparison of cost of protection against differential power analysis of selected authenticated ciphers. HOST 2018: 147-152 - [c28]Michael Tempelmeier, Georg Sigl, Jens-Peter Kaps:
Experimental Power and Performance Evaluation of CAESAR Hardware Finalists. ReConFig 2018: 1-6 - [i3]William Diehl, Abubakr Abdulgadir, Farnoud Farahmand, Jens-Peter Kaps, Kris Gaj:
Comparison of Cost of Protection Against Differential Power Analysis of Selected Authenticated Ciphers. IACR Cryptol. ePrint Arch. 2018: 341 (2018) - [i2]Farnoud Farahmand, William Diehl, Abubakr Abdulgadir, Jens-Peter Kaps, Kris Gaj:
Improved Lightweight Implementations of CAESAR Authenticated Ciphers. IACR Cryptol. ePrint Arch. 2018: 573 (2018) - 2017
- [j4]Bilal Habib, Jens-Peter Kaps, Kris Gaj:
Implementation of efficient SR-Latch PUF on FPGA and SoC devices. Microprocess. Microsystems 53: 92-105 (2017) - [c27]William Diehl, Farnoud Farahmand, Panasayya Yalla, Jens-Peter Kaps, Kris Gaj:
Comparison of hardware and software implementations of selected lightweight block ciphers. FPL 2017: 1-4 - [c26]William Diehl, Abubakr Abdulgadir, Jens-Peter Kaps, Kris Gaj:
Comparing the cost of protecting selected lightweight block ciphers against differential power analysis in low-cost FPGAs. FPT 2017: 128-135 - [c25]Ahmad Salman, William Diehl, Jens-Peter Kaps:
A light-weight hardware/software co-design for pairing-based cryptography with low power and energy consumption. FPT 2017: 235-238 - [c24]William Diehl, Abubakr Abdulgadir, Jens-Peter Kaps, Kris Gaj:
Side-channel resistant soft core processor for lightweight block ciphers. ReConFig 2017: 1-8 - [c23]Ahmad Salman, Ahmed Ferozpuri, Ekawat Homsirikamol, Panasayya Yalla, Jens-Peter Kaps, Kris Gaj:
A scalable ECC processor implementation for high-speed and lightweight with side-channel countermeasures. ReConFig 2017: 1-8 - [c22]Panasayya Yalla, Jens-Peter Kaps:
Evaluation of the CAESAR hardware API for lightweight implementations. ReConFig 2017: 1-6 - 2016
- [c21]Michael Tempelmeier, Fabrizio De Santis, Jens-Peter Kaps, Georg Sigl:
An area-optimized serial implementation of ICEPOLE authenticated encryption schemes. HOST 2016: 49-54 - [i1]Ekawat Homsirikamol, William Diehl, Ahmed Ferozpuri, Farnoud Farahmand, Panasayya Yalla, Jens-Peter Kaps, Kris Gaj:
CAESAR Hardware API. IACR Cryptol. ePrint Arch. 2016: 626 (2016) - 2015
- [c20]Bilal Habib, Jens-Peter Kaps, Kris Gaj:
Efficient SR-Latch PUF. ARC 2015: 205-216 - [c19]Panasayya Yalla, Ekawat Homsirikamol, Jens-Peter Kaps:
Comparison of multi-purpose cores of Keccak and AES. DATE 2015: 585-588 - 2013
- [c18]Bilal Habib, Kris Gaj, Jens-Peter Kaps:
FPGA PUF Based on Programmable LUT Delays. DSD 2013: 697-704 - [c17]Rajesh Velegalati, Kinjal Shah, Jens-Peter Kaps:
Glitch Detection in Hardware Implementations on FPGAs Using Delay Based Sampling Techniques. DSD 2013: 947-954 - 2011
- [c16]Xin Xin, Jens-Peter Kaps, Kris Gaj:
A Configurable Ring-Oscillator-Based PUF for Xilinx FPGAs. DSD 2011: 651-657 - [c15]Rajesh Velegalati, Jens-Peter Kaps:
Improving Security of SDDL Designs through Interleaved Placement on Xilinx FPGAs. FPL 2011: 506-511 - [c14]Jens-Peter Kaps, Panasayya Yalla, Kishore Kumar Surapathi, Bilal Habib, Susheel Vadlamudi, Smriti Gurung, John Pham:
Lightweight Implementations of SHA-3 Candidates on FPGAs. INDOCRYPT 2011: 270-289 - [c13]Ahmad Salman, Marcin Rogawski, Jens-Peter Kaps:
Efficient Hardware Accelerator for IPSec Based on Partial Reconfiguration on Xilinx FPGAs. ReConFig 2011: 242-248 - 2010
- [c12]Jens-Peter Kaps, Rajesh Velegalati:
DPA Resistant AES on FPGA Using Partial DDL. FCCM 2010: 273-280 - [c11]Kris Gaj, Jens-Peter Kaps, Venkata Amirineni, Marcin Rogawski, Ekawat Homsirikamol, Benjamin Y. Brewster:
ATHENa - Automated Tool for Hardware EvaluatioN: Toward Fair and Comprehensive Benchmarking of Cryptographic Hardware Using FPGAs. FPL 2010: 414-421 - [c10]Rajesh Velegalati, Jens-Peter Kaps:
Techniques to enable the use of Block RAMs on FPGAS with Dynamic and Differential Logic. ICECS 2010: 1244-1247 - [c9]Shaunak Shah, Rajesh Velegalati, Jens-Peter Kaps, David Hwang:
Investigation of DPA Resistance of Block RAMs in Cryptographic Implementations on FPGAs. ReConFig 2010: 274-279
2000 – 2009
- 2009
- [c8]Rajesh Velegalati, Jens-Peter Kaps:
DPA resistance for light-weight implementations of cryptographic algorithms on FPGAs. FPL 2009: 385-390 - [c7]Panasayya Yalla, Jens-Peter Kaps:
Compact FPGA implementation of Camellia. FPL 2009: 658-661 - [c6]Panasayya Yalla, Jens-Peter Kaps:
Lightweight Cryptography for FPGAs. ReConFig 2009: 225-230 - 2008
- [c5]Jens-Peter Kaps:
Chai-Tea, Cryptographic Hardware Implementations of xTEA. INDOCRYPT 2008: 363-375 - 2007
- [j3]Jens-Peter Kaps, Gunnar Gaubatz, Berk Sunar:
Cryptography on a Speck of Dust. Computer 40(2): 38-44 (2007) - 2006
- [c4]Jens-Peter Kaps, Berk Sunar:
Energy Comparison of AES and SHA-1 for Ubiquitous Computing. EUC Workshops 2006: 372-381 - 2005
- [j2]Jens-Peter Kaps, Kaan Yüksel, Berk Sunar:
Energy Scalable Universal Hashing. IEEE Trans. Computers 54(12): 1484-1495 (2005) - [c3]Gunnar Gaubatz, Jens-Peter Kaps, Erdinç Öztürk, Berk Sunar:
State of the Art in Ultra-Low Power Public Key Cryptography for Wireless Sensor Networks. PerCom Workshops 2005: 146-150 - 2004
- [c2]Gunnar Gaubatz, Jens-Peter Kaps, Berk Sunar:
Public Key Cryptography in Sensor Networks - Revisited. ESAS 2004: 2-18
1990 – 1999
- 1999
- [j1]Jens-Peter Kaps, Christof Paar:
DES auf FPGAs - Hochgeschwindigkeits-Architekturen für den Data Encryption Standard auf rekonfigurierbarer Hardware. Datenschutz und Datensicherheit 23(9) (1999) - 1998
- [c1]Jens-Peter Kaps, Christof Paar:
Fast DES Implementation for FPGAs and Its Application to a Universal Key-Search Machine. Selected Areas in Cryptography 1998: 234-247
Coauthor Index
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