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Kang-Deog Suh
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2010 – 2019
- 2010
- [j12]Youngsun Song, Ki-Tae Park, Myounggon Kang, Yunheub Song, Sungsoo Lee, Youngho Lim, Kang-Deog Suh:
Boosted Bit Line Program Scheme for Low Operating Voltage MLC NAND Flash Memory. IEICE Trans. Electron. 93-C(3): 423-425 (2010) - [j11]Ki-Tae Park, Youngsun Song, Myounggon Kang, Sungsoo Lee, Youngho Lim, Kang-Deog Suh, Chilhee Chung:
Dynamic Vpass Controlled Program Scheme and Optimized Erase Vth Control for High Program Inhibition in MLC NAND Flash Memories. IEEE J. Solid State Circuits 45(10): 2165-2172 (2010)
2000 – 2009
- 2003
- [j10]June Lee, Sung-Soo Lee, Oh-Suk Kwon, Kyeong-Han Lee, Dae-Seok Byeon, In-Young Kim, Kyoung-Hwa Lee, Young-Ho Lim, Byung-Soon Choi, Jong-Sik Lee, Wang-Chul Shin, Jeong-Hyuk Choi, Kang-Deog Suh:
A 90-nm CMOS 1.8-V 2-Gb NAND flash memory for mass storage applications. IEEE J. Solid State Circuits 38(11): 1934-1942 (2003) - 2002
- [j9]June Lee, Heung-Soo Im, Dae-Seok Byeon, Kyeong-Han Lee, Dong-Hyuk Chae, Kyong-Hwa Lee, Sang Won Hwang, Sung-Soo Lee, Young-Ho Lim, Jae-Duk Lee, Jung-Dal Choi, Young-Il Seo, Jong-Sik Lee, Kang-Deog Suh:
High-performance 1-Gb-NAND flash memory with 0.12-μm technology. IEEE J. Solid State Circuits 37(11): 1502-1509 (2002) - 2001
- [j8]Taehee Cho, Yeong-Taek Lee, Eun-Cheol Kim, Jin-Wook Lee, Sunmi Choi, Seungjae Lee
, Dong-Hwan Kim, Wook-Ghee Han, Young-Ho Lim, Jae-Duk Lee, Jung-Dal Choi, Kang-Deog Suh:
A dual-mode NAND flash memory: 1-Gb multilevel and high-performance 512-Mb single-level modes. IEEE J. Solid State Circuits 36(11): 1700-1706 (2001) - 2000
- [j7]Yeonbae Chung, Byung-Gil Jeon, Kang-Deog Suh:
A 3.3-V, 4-Mb nonvolatile ferroelectric RAM with selectively driven double-pulsed plate read/write-back scheme. IEEE J. Solid State Circuits 35(5): 697-704 (2000) - [j6]Byung-Gil Jeon, Mun-Kyu Choi, Yoonjong Song, Seung-Kyu Oh, Yeonbae Chung, Kang-Deog Suh, Kinam Kim:
A 0.4-μm 3.3-V 1T1C 4-Mb nonvolatile ferroelectric RAM with fixed bitline reference voltage scheme and data protection circuit. IEEE J. Solid State Circuits 35(11): 1690-1694 (2000)
1990 – 1999
- 1998
- [j5]Kyu-Hyoun Kim
An 8-bit-resolution, 360-μs write time nonvolatile analog memory based on differentially balanced constant-tunneling-current scheme (DBCS). IEEE J. Solid State Circuits 33(11): 1758-1762 (1998) - 1997
- [j4]Jin-Ki Kim, Koji Sakui, Sung-Soo Lee, Yasuo Itoh, Suk-Chon Kwon, Kazuhisa Kanazawa, Ki-Jun Lee, Hiroshi Nakamura, Kang-Young Kim, Toshihiko Himeno, Jang-Rae Kim, Kazushige Kanda, Tae-Sung Jung, Yoichi Oshima, Kang-Deog Suh, Kazuhiko Hashimoto, Sung-Tae Ahn, Junichi Miyamoto:
A 120-mm2 64-Mb NAND flash memory achieving 180 ns/Byte effective program speed. IEEE J. Solid State Circuits 32(5): 670-680 (1997) - [j3]Tae-Sung Jung, Do-Chan Choi, Sung-Hee Cho, Myong-Jae Kim, Seung-Keun Lee, Byung-Soon Choi, Jin-Sun Yum, San-Hong Kim, Dong-Gi Lee, Jong-Chang Son, Myung-Sik Yong, Heung-Kwun Oh, Sung-Bu Jun, Woung-Moo Lee, E. Haq, Kang-Deog Suh, S. B. Ali, Hyung-Kyu Lim:
A 3.3-V single power supply 16-Mb nonvolatile virtual DRAM using a NAND flash memory technology. IEEE J. Solid State Circuits 32(11): 1748-1757 (1997) - 1996
- [j2]Tae-Sung Jung, Young-Joon Choi, Kang-Deog Suh, Byung-Hoon Suh, Jin-Ki Kim, Young-Ho Lim, Yong-Nam Koh, Jong-Wook Park, Ki-Jong Lee, Jung-Hoon Park, Kee-Tae Park, Jhang-Rae Kim, Jeong-Hyong Yi, Hyung-Kyu Lim:
A 117-mm2 3.3-V only 128-Mb multilevel NAND flash memory for mass storage applications. IEEE J. Solid State Circuits 31(11): 1575-1583 (1996) - 1995
- [j1]Kang-Deog Suh, Byung-Hoon Suh, Young-Ho Lim, Jin-Ki Kim, Young-Joon Choi, Yong-Nam Koh, Sung-Soo Lee, Suk-Chon Kwon, Byung-Soon Choi, Jin-Sun Yum, Jung-Hyuk Choi, Jang-Rae Kim, Hyung-Kyu Lim:
A 3.3 V 32 Mb NAND flash memory with incremental step pulse programming scheme. IEEE J. Solid State Circuits 30(11): 1149-1156 (1995)
Coauthor Index
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