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Dmitry I. Cheremisinov

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2010 – 2019

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2013
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Dmitry I. Cheremisinov:
Design automation tool to generate EDIF and VHDL descriptions of circuit by extraction of FPGA configuration. EWDTS 2013: 1-4
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Dmitry I. Cheremisinov, Liudmila D. Cheremisinova:
Low-power design of combinational CMOS networks. EWDTS 2013: 1-4

2000 – 2009

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2008
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Dmitry I. Cheremisinov, Liudmila D. Cheremisinova:
Programming of agents in the PRALU language. Autom. Control. Comput. Sci. 42(4): 175-183 (2008)
2007
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Dmitry I. Cheremisinov:
Synthesis of computer programs that implement finite automata. Autom. Control. Comput. Sci. 41(4): 215-223 (2007)

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