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Ram Rangan
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2020 – today
- 2022
- [j10]Aditya Ukarande, Suryakant Patidar, Ram Rangan:
Locality-Aware CTA Scheduling for Gaming Applications. ACM Trans. Archit. Code Optim. 19(1): 1:1-1:26 (2022) - [c13]Sana Damani, Mark Stephenson, Ram Rangan, Daniel R. Johnson, Rishkul Kulkami, Stephen W. Keckler:
GPU Subwarp Interleaving. HPCA 2022: 1184-1197 - 2021
- [j9]Mark Stephenson, Ram Rangan, Stephen W. Keckler:
Cooperative Profile Guided Optimizations. Comput. Graph. Forum 40(8): 71-83 (2021) - [j8]Ram Rangan, Naman Turakhia, Alexandre Joly:
Corrections to "Countering Load-to-Use Stalls in the NVIDIA Turing GPU". IEEE Micro 41(1): 83 (2021) - [c12]Mark Stephenson, Ram Rangan:
PGZ: automatic zero-value code specialization. CC 2021: 36-46 - 2020
- [j7]Ram Rangan, Naman Turakhia, Alexandre Joly:
Countering Load-to-Use Stalls in the NVIDIA Turing GPU. IEEE Micro 40(6): 59-66 (2020) - [j6]Ram Rangan, Mark W. Stephenson, Aditya Ukarande, Shyam Murthy, Virat Agarwal, Marc Blackstein:
Zeroploit: Exploiting Zero Valued Operands in Interactive Gaming Applications. ACM Trans. Archit. Code Optim. 17(3): 17:1-17:26 (2020) - [i1]Mark W. Stephenson, Ram Rangan:
AZP: Automatic Specialization for Zero Values in Gaming Applications. CoRR abs/2011.10550 (2020)
2010 – 2019
- 2013
- [j5]Peter Altevogt, Tibor Kiss, Mike Kistler, Ram Rangan:
Mesoscale performance simulation of multicore processor systems. Softw. Syst. Model. 12(4): 731-744 (2013) - 2010
- [c11]Mark Stephenson, Ram Rangan, Emmanuel Yashchin, Eric Van Hensbergen:
Statistically regulating program behavior via mainstream computing. CGO 2010: 238-247
2000 – 2009
- 2009
- [c10]Mark Stephenson, Lixin Zhang, Ram Rangan:
Lightweight predication support for out of order processors. HPCA 2009: 201-212 - 2008
- [j4]Ram Rangan, Neil Vachharajani, Guilherme Ottoni, David I. August:
Performance scalability of decoupled software pipelining. ACM Trans. Archit. Code Optim. 5(2): 8:1-8:25 (2008) - [c9]Easwaran Raman, Neil Vachharajani, Ram Rangan, David I. August:
Spice: speculative parallel iteration chunk execution. CGO 2008: 175-184 - 2007
- [c8]Neil Vachharajani, Ram Rangan, Easwaran Raman, Matthew J. Bridges, Guilherme Ottoni, David I. August:
Speculative Decoupled Software Pipelining. PACT 2007: 49-59 - 2006
- [j3]Guilherme Ottoni, Ram Rangan, Adam Stoler, Matthew J. Bridges, David I. August:
From sequential programs to concurrent threads. IEEE Comput. Archit. Lett. 5(1): 6-9 (2006) - [c7]Ram Rangan, Neil Vachharajani, Adam Stoler, Guilherme Ottoni, David I. August, George Z. N. Cai:
Support for High-Frequency Streaming in CMPs. MICRO 2006: 259-272 - 2005
- [j2]Julia Chen, Philo Juang, Kevin Ko, Gilberto Contreras, David Penry, Ram Rangan, Adam Stoler, Li-Shiuan Peh, Margaret Martonosi:
Hardware-modulated parallelism in chip multiprocessors. SIGARCH Comput. Archit. News 33(4): 54-63 (2005) - [j1]George A. Reis, Jonathan Chang, Neil Vachharajani, Ram Rangan, David I. August, Shubhendu S. Mukherjee:
Software-controlled fault tolerance. ACM Trans. Archit. Code Optim. 2(4): 366-396 (2005) - [c6]George A. Reis, Jonathan Chang, Neil Vachharajani, Ram Rangan, David I. August:
SWIFT: Software Implemented Fault Tolerance. CGO 2005: 243-254 - [c5]George A. Reis, Jonathan Chang, Neil Vachharajani, Ram Rangan, David I. August, Shubhendu S. Mukherjee:
Design and Evaluation of Hybrid Fault-Detection Systems. ISCA 2005: 148-159 - [c4]Arijit Biswas, Paul Racunas, Razvan Cheveresan, Joel S. Emer, Shubhendu S. Mukherjee, Ram Rangan:
Computing Architectural Vulnerability Factors for Address-Based Structures. ISCA 2005: 532-543 - [c3]Guilherme Ottoni, Ram Rangan, Adam Stoler, David I. August:
Automatic Thread Extraction with Decoupled Software Pipelining. MICRO 2005: 105-118 - 2004
- [c2]Ram Rangan, Neil Vachharajani, Manish Vachharajani, David I. August:
Decoupled Software Pipelining with the Synchronization Array. IEEE PACT 2004: 177-188 - [c1]Neil Vachharajani, Matthew J. Bridges, Jonathan Chang, Ram Rangan, Guilherme Ottoni, Jason A. Blome, George A. Reis, Manish Vachharajani, David I. August:
RIFLE: An Architectural Framework for User-Centric Information-Flow Security. MICRO 2004: 243-254
Coauthor Index
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