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Philippe Bénabès
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2020 – today
- 2023
- [c33]Béatrice Guénégo, Caroline Lelandais-Perrault, Emilie Avignon-Meseldzija, Gérard Sou, Philippe Bénabès:
Design of an ECG front-end considering ST segment distortion. LASCAS 2023: 1-4 - 2020
- [j3]João Alberto de França Ferreira
, Emilie Avignon-Meseldzija
Design of integrated all-pass filters with linear group delay for analog signal processing applications. Int. J. Circuit Theory Appl. 48(5): 658-673 (2020) - [c32]Saman Fatima, Emilie Avignon-Meseldzija
A CMOS readout circuit for a low shunt resistance IR photo-detector. ICECS 2020: 1-4
2010 – 2019
- 2019
- [c31]Li Huang, Caroline Lelandais-Perrault, Anthony Kolar
A new algorithm for an incremental sigma-delta converter reconstruction filter. SBCCI 2019: 32 - 2018
- [c30]João Alberto de França Ferreira, Emilie Avignon-Meseldzija
Design and Synthesis of Arbitrary Group Delay Filters for Integrated Analog Signal Processing. ICECS 2018: 613-616 - 2017
- [c29]L. Cron, P. Laugier, Pietro Maris Ferreira
Delay estimation and measurement circuit for a high-speed CMOS clocked comparator. ECCTD 2017: 1-4 - [c28]Alexandre Mas, Eric Andre, Caroline Lelandais-Perrault, Filipe Vinci dos Santos, Philippe Bénabès:
Analog bandwidth mismatch compensation for time-interleaved ADCs using FD-SOI technology. ISCAS 2017: 1-4 - [c27]Pierre Bisiaux, Caroline Lelandais-Perrault, Anthony Kolar, Philippe Bénabès, Filipe Vinci dos Santos:
A 14-b two-step inverter-based ΣΔ ADC for CMOS image sensor. NEWCAS 2017: 217-220 - 2016
- [c26]Pierre Bisiaux, Caroline Lelandais-Perrault, Anthony Kolar, Philippe Bénabès, Filipe Vinci dos Santos:
A new two-step ΣΔ architecture column-parallel ADC for CMOS image sensor. SBCCI 2016: 1-6 - 2015
- [c25]Pietro Maris Ferreira
Optimization Methodology for a 460-MHz-GBW and 80-dB-SNR Low-Power Current-Mode Amplifier. SBCCI 2015: 21:1-21:6 - 2014
- [c24]Nicolas Le Dortz, Jean-Pierre Blanc, Thierry Simon, Sarah Verhaeren, Emmanuel Rouat, Pascal Urard, Stéphane Le Tual, Dimitri Goguet, Caroline Lelandais-Perrault, Philippe Bénabès:
22.5 A 1.62GS/s time-interleaved SAR ADC with digital background mismatch calibration achieving interleaving spurs below 70dBFS. ISSCC 2014: 386-388 - [c23]Philippe Bénabès, Caroline Lelandais-Perrault, Nicolas Le Dortz:
Mismatch calibration methods for high-speed time-interleaved ADCs. NEWCAS 2014: 49-52 - 2013
- [j2]Mohammad Javidan, Jérôme Juillard, Philippe Bénabès:
High-loop-delay sixth-order bandpass continuoustime Sigma-Delta modulators. IET Circuits Devices Syst. 7(6): 305-312 (2013) - [c22]Fabien Todeschini, Christophe Planat, Patrizia Milazzo, Salvatore Tricomi, Pascal Urard, Philippe Bénabès:
A Nano quiescent Current Power Management for Autonomous Wireless Sensor Network. ICECS 2013: 815-818 - [c21]Philippe Bénabès:
A design methodology for delta-sigma converters based on solid-state passive filters. NEWCAS 2013: 1-4 - 2012
- [c20]Catalin-Adrian Tugui, R. Benassi, S. Apostol, Philippe Bénabès:
Efficient optimization methodology for CT functions based on a modified bayesian kriging approach. ICECS 2012: 456-459 - 2011
- [c19]Alban Gruget, Morgan Roger
Optimization of bandpass charge sampling filters in hybrid filter banks converters for cognitive radio applications. ECCTD 2011: 785-788 - [c18]Van Tam Nguyen, Hussein Fakhoury, Patrick Loumeau, Philippe Bénabès:
Generalized multi-stage closed loop sigma delta modulator. ISCAS 2011: 1379-1382 - [c17]Philippe Bénabès, Catalin-Adrian Tugui:
Effective modeling of CT functions for fast simulations using MATLAB-Simulink and VHDLAMS applied to Sigma-Delta architectures. ISCAS 2011: 2269-2272 - 2010
- [c16]Zhiguo Song, Caroline Lelandais-Perrault, Daniel Poulton, Philippe Bénabès:
Synthesis of Subband Hybrid Filter Banks ADCs with finite word-length coefficients using adaptive equalization. ISCAS 2010: 577-580
2000 – 2009
- 2009
- [j1]Philippe Bénabès:
Accurate Time-Domain Simulation of Continuous-Time Sigma-Delta Modulators. IEEE Trans. Circuits Syst. I Regul. Pap. 56-I(10): 2248-2258 (2009) - [c15]Zhiguo Song, Caroline Lelandais-Perrault, Daniel Poulton, Philippe Bénabès:
Adaptive equalization for calibration of subband hybrid filter banks A/D converters. ECCTD 2009: 45-48 - [c14]Esmaeil Najafi Aghdam
Completely first order and tone free partitioned data weighted averaging technique used in a multibit delta sigma modulator. ECCTD 2009: 53-56 - [c13]Zhiguo Song, Caroline Lelandais-Perrault, Philippe Bénabès:
Synthesis of complex subband Hybrid Filter Banks A/D converters using adaptive filters. ICECS 2009: 399-402 - 2008
- [c12]Mohammad Javidan, Philippe Bénabès:
Band-pass continuous-time delta-sigma modulators employing LWR resonators. ICECS 2008: 1119-1122 - [c11]Philippe Bénabès, Ali Beydoun:
Fixed-step simulation of Continuous-Time SigmaDelta modulators. ISCAS 2008: 1886-1889 - 2007
- [c10]Philippe Bénabès, Sylvie Guessab:
A Sigma-Delta Converter with Adjustable Tradeoff between Resolution and Consumption. ICECS 2007: 230-233 - 2006
- [c9]Ali Beydoun, Philippe Bénabès:
Bandpass / wideband ADC architecture using parallel delta sigma modulators. EUSIPCO 2006: 1-4 - [c8]Esmaeil Najafi Aghdam
A hardware efficient 3-bit second-order dynamic element matching circuit clocked at 300MHz. ISCAS 2006 - 2005
- [c7]Esmaeil Najafi Aghdam
Higher order dynamic element matching by shortened tree-structure in delta-sigma modulators. ECCTD 2005: 201-204 - 2003
- [c6]Caroline Lelandais-Perrault, Philippe Bénabès, Jean-Luc De Gouy, Richard Kielbasa:
A parallel structure of a continuous-time filter for band-pass sigma-delta A/D converters. ICECS 2003: 954-957 - [c5]Esmaeil Najafi Aghdam
A new mixed stable DEM algorithm for bandpass multibit delta sigma ADC. ICECS 2003: 962-965 - [c4]Philippe Bénabès, Alain Gauthier, Jacques Oksman:
A Manchester code generator running at 1 GHz. ICECS 2003: 1156-1159 - 2001
- [c3]Abdeljalil Yahias, Philippe Bénabès, Richard Kielbasa:
Bandpass Delta-Sigma modulators synthesis with high loop delay. ISCAS (1) 2001: 344-347
1990 – 1999
- 1999
- [c2]Philippe Bénabès, Alain Gauthier, Richard Kielbasa, M. Goetz, M. G. Forbes, Marc P. Y. Desmulliez, A. C. Walker:
Design of an optoelectronic crossbar based on 0.6 μm CMOS process with a 1 Tbit/s optical input. ICECS 1999: 257-260 - 1997
- [c1]Philippe Bénabès, Mansour Keramat, Richard Kielbasa:
A methodology for designing continuous-time sigma-delta modulators. ED&TC 1997: 46-50
Coauthor Index
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