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Won Ho Choi
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2020 – today
- 2020
- [c13]Won Ho Choi, Pi-Feng Chiu, Wen Ma, Gertjan Hemink, Tung Thanh Hoang, Martin Lueker-Boden, Zvonimir Bandic:
An In-Flash Binary Neural Network Accelerator with SLC NAND Flash Array. ISCAS 2020: 1-5 - [c12]Wen Ma, Tyler Hennen, Martin Lueker-Boden, Rick Galbraith, Jonas Goode, Won Ho Choi, Pi-Feng Chiu, Jonathan A. J. Rupp, Dirk J. Wouters, Rainer Waser, Daniel Bedau:
A Mott Insulator-Based Oscillator Circuit for Reservoir Computing. ISCAS 2020: 1-5 - [i2]Wen Ma, Pi-Feng Chiu, Won Ho Choi, Minghai Qin, Daniel Bedau, Martin Lueker-Boden:
Non-Volatile Memory Array Based Quantization- and Noise-Resilient LSTM Neural Networks. CoRR abs/2002.10636 (2020)
2010 – 2019
- 2019
- [j2]Won Ho Choi
, Sunghwan Kim, Dongun Lee
Soft, Multi-DoF, Variable Stiffness Mechanism Using Layer Jamming for Wearable Robots. IEEE Robotics Autom. Lett. 4(3): 2539-2546 (2019) - [c11]Yongjune Kim
On the Optimal Refresh Power Allocation for Energy-Efficient Memories. GLOBECOM 2019: 1-6 - [c10]Wen Ma, Pi-Feng Chiu, Won Ho Choi, Minghai Qin, Daniel Bedau
Non-Volatile Memory Array Based Quantization- and Noise-Resilient LSTM Neural Networks. ICRC 2019: 25-33 - [c9]Pi-Feng Chiu, Won Ho Choi, Wen Ma, Minghai Qin, Martin Lueker-Boden:
A Binarized Neural Network Accelerator with Differential Crosspoint Memristor Array for Energy-Efficient MAC Operations. ISCAS 2019: 1-5 - [i1]Yongjune Kim, Won Ho Choi, Cyril Guyot, Yuval Cassuto:
On the Optimal Refresh Power Allocation for Energy-Efficient Memories. CoRR abs/1907.01112 (2019) - 2018
- [c8]Wen Ma, Minghai Qin, Won Ho Choi, Pi-Feng Chiu, Martin Lueker-Boden:
Improving Noise Tolerance of Hardware Accelerated Artificial Neural Networks. ICMLA 2018: 797-801 - [c7]Qianying Tang, Won Ho Choi, Luke R. Everson, Keshab K. Parhi
A Physical Unclonable Function based on Capacitor Mismatch in a Charge-Redistribution SAR-ADC. ISCAS 2018: 1-5 - 2015
- [c6]Won Ho Choi, Hoon Ki Kim, Chris H. Kim:
Circuit techniques for mitigating short-term vth instability issues in successive approximation register (SAR) ADCs. CICC 2015: 1-4 - [c5]Saroj Satapathy, Won Ho Choi, Xiaofei Wang, Chris H. Kim:
A revolving reference odometer circuit for BTI-induced frequency fluctuation measurements under fast DVFS transients. IRPS 2015: 6 - 2014
- [c4]Won Ho Choi, Saroj Satapathy, John Keane, Chris H. Kim:
A test circuit based on a ring oscillator array for statistical characterization of Plasma-Induced Damage. CICC 2014: 1-4 - 2012
- [j1]Young-Jae Min, Chan-Hui Jeong, Kyu-Young Kim, Won Ho Choi, Jong-Pil Son, Chulwoo Kim, Soo-Won Kim:
A 0.31-1 GHz Fast-Corrected Duty-Cycle Corrector With Successive Approximation Register for DDR DRAM Applications. IEEE Trans. Very Large Scale Integr. Syst. 20(8): 1524-1528 (2012) - [c3]Pingqiang Zhou, Won Ho Choi, Bongjin Kim, Chris H. Kim, Sachin S. Sapatnekar:
Optimization of on-chip switched-capacitor DC-DC converters for high-performance applications. ICCAD 2012: 263-270
2000 – 2009
- 2008
- [c2]Wookwan Lee, Won Ho Choi, Young-Jae Min, Hoon Ki Kim, Soo-Won Kim:
The low-power and low-area PWM by light intensity for photoflash in 0.35-µm CMOS. ISCAS 2008: 1724-1727
1990 – 1999
- 1995
- [c1]Dong Hyuk Choi, Won Ho Choi:
Design of a partially activated neural network. ICNN 1995: 1282-1286
Coauthor Index
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